ad45efc445
We have some combines/lowerings that attempt to use PACKSS-then-PACKUS and others that use PACKUS-then-PACKSS. PACKUS is much easier to combine with if we know the upper bits are zero as ComputeKnownBits can easily see through BITCASTs etc. especially now that rL333995 and rL334007 have landed. It also effectively works at byte level which further simplifies shuffle combines. The only (minor) annoyances are that ComputeKnownBits can sometimes take longer as it doesn't fail as quickly as ComputeNumSignBits (but I'm not seeing any actual regressions in tests) and PACKUSDW only became available after SSE41 so we have more codegen diffs between targets. llvm-svn: 334276
90 lines
3.0 KiB
LLVM
90 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
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; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
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define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
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; CHECK-LABEL: update:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: movl $0, (%esp)
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; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4]
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; CHECK-NEXT: jmp .LBB0_1
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_2: # %forbody
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; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: leal (,%eax,8), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: addl %ecx, %edx
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; CHECK-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: pmovzxbw {{.*#+}} xmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
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; CHECK-NEXT: psubw %xmm0, %xmm2
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; CHECK-NEXT: pand %xmm1, %xmm2
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; CHECK-NEXT: packuswb %xmm0, %xmm2
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; CHECK-NEXT: movq %xmm2, (%edx,%eax,8)
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; CHECK-NEXT: incl (%esp)
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; CHECK-NEXT: .LBB0_1: # %forcond
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jl .LBB0_2
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; CHECK-NEXT: # %bb.3: # %afterfor
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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entry:
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%dst_i.addr = alloca i64*
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%src_i.addr = alloca i64*
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%n.addr = alloca i32
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%i = alloca i32, align 4
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%dst = alloca <8 x i8>*, align 4
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%src = alloca <8 x i8>*, align 4
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store i64* %dst_i, i64** %dst_i.addr
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store i64* %src_i, i64** %src_i.addr
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store i32 %n, i32* %n.addr
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store i32 0, i32* %i
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br label %forcond
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forcond:
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%tmp = load i32, i32* %i
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%tmp1 = load i32, i32* %n.addr
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%cmp = icmp slt i32 %tmp, %tmp1
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br i1 %cmp, label %forbody, label %afterfor
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forbody:
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%tmp2 = load i32, i32* %i
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%tmp3 = load i64*, i64** %dst_i.addr
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%arrayidx = getelementptr i64, i64* %tmp3, i32 %tmp2
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%conv = bitcast i64* %arrayidx to <8 x i8>*
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store <8 x i8>* %conv, <8 x i8>** %dst
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%tmp4 = load i32, i32* %i
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%tmp5 = load i64*, i64** %src_i.addr
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%arrayidx6 = getelementptr i64, i64* %tmp5, i32 %tmp4
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%conv7 = bitcast i64* %arrayidx6 to <8 x i8>*
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store <8 x i8>* %conv7, <8 x i8>** %src
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%tmp8 = load i32, i32* %i
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%tmp9 = load <8 x i8>*, <8 x i8>** %dst
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%arrayidx10 = getelementptr <8 x i8>, <8 x i8>* %tmp9, i32 %tmp8
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%tmp11 = load i32, i32* %i
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%tmp12 = load <8 x i8>*, <8 x i8>** %src
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%arrayidx13 = getelementptr <8 x i8>, <8 x i8>* %tmp12, i32 %tmp11
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%tmp14 = load <8 x i8>, <8 x i8>* %arrayidx13
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%add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 >
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%and = and <8 x i8> %add, < i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4 >
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store <8 x i8> %and, <8 x i8>* %arrayidx10
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br label %forinc
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forinc:
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%tmp15 = load i32, i32* %i
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%inc = add i32 %tmp15, 1
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store i32 %inc, i32* %i
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br label %forcond
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afterfor:
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ret void
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}
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