Jyotsna Verma c7dcc2fbc5 Hexagon: Handle i8, i16 and i1 Var Args. ...

llvm-svn: 176647

2013-03-07 20:28:34 +00:00

..

AArch64

AArch64: be more careful resorting to inefficient addressing for weak vars.

2013-02-28 14:36:31 +00:00

ARM

ARM NEON: Fix v2f32 float intrinsics

2013-03-02 19:38:33 +00:00

CPP

test commit

2012-07-18 17:53:05 +00:00

Generic

For inline asm:

2013-01-11 18:12:39 +00:00

Hexagon

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

[mips] Custom-legalize BR_JT.

2013-03-06 21:32:03 +00:00

MSP430

Add support for varargs functions for msp430.

2012-11-21 17:28:27 +00:00

NVPTX

[NVPTX] Disable vector registers

2013-02-12 14:18:49 +00:00

PowerPC

Fix PR15332 (patch by Florian Zeitz).

2013-02-26 21:28:57 +00:00

R600

R600: Turn BUILD_VECTOR into Reg_Sequence

2013-03-05 15:04:49 +00:00

SI

Add R600 backend

2012-12-11 21:25:42 +00:00

SPARC

Use TargetTransformInfo to control switch-to-lookup table transformation

2012-10-30 11:23:25 +00:00

Thumb

llvm/test/CodeGen/Thumb/iabs.ll: Add explicit -mtriple=thumb-unknown-unknown to appease win32 hosts.

2013-03-05 02:18:52 +00:00

Thumb2

SDAG: Handle scalarizing an extend of a <1 x iN> vector.

2013-03-07 05:47:54 +00:00

X86

Move testcase, this is testing extraction not inserting.

2013-03-07 18:51:02 +00:00

XCore

Fix handling of aliases to functions.

2012-11-16 21:12:38 +00:00