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llvm-project/llvm/lib/Target/Mips
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Shoreshen 768240d019
[AMDGPU] Insert readfirstlane for uniform VGPR arguments (#178198) 
Fix inreg argument, which is uniform, but using VGPR due to run out of
SGPR.

---------

Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>
2026-03-03 10:11:25 +08:00
..
AsmParser
[Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (#176666)
2026-01-28 04:32:59 -05:00
Disassembler
MIPSr6: Set FSELECT Legal for f64 (#173591)
2025-12-26 18:49:41 +08:00
MCTargetDesc
[MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (#183339)
2026-02-25 14:41:45 -08:00
TargetInfo
[llvm] annotate interfaces in llvm/Target for DLL export (#143615)
2025-06-17 13:28:45 -07:00
CMakeLists.txt
[Mips] TableGen-erate SDNode descriptions (#168307)
2025-12-05 14:53:14 +00:00
MicroMips32r6InstrFormats.td
…
MicroMips32r6InstrInfo.td
MIPSr6: Set FSELECT Legal for f64 (#173591)
2025-12-26 18:49:41 +08:00
MicroMipsDSPInstrFormats.td
…
MicroMipsDSPInstrInfo.td
…
MicroMipsInstrFormats.td
[Target] Remove SoftFail field on targets that don't use it (NFC) (#154659)
2025-08-21 05:21:42 +03:00
MicroMipsInstrFPU.td
[Mips] Remove NoNaNsFPMath uses (#183045)
2026-02-26 18:49:16 +08:00
MicroMipsInstrInfo.td
Mips: Switch to RegClassByHwMode (#158273)
2025-09-19 13:50:07 +00:00
MicroMipsSizeReduction.cpp
[Mips] Remove unnecessary casts (NFC) (#148392)
2025-07-12 15:46:12 -07:00
Mips16FrameLowering.cpp
…
Mips16FrameLowering.h
…
Mips16HardFloat.cpp
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Mips16HardFloatInfo.cpp
…
Mips16HardFloatInfo.h
…
Mips16InstrFormats.td
[Target] Remove SoftFail field on targets that don't use it (NFC) (#154659)
2025-08-21 05:21:42 +03:00
Mips16InstrInfo.cpp
[NFC][MI] Tidy Up RegState enum use (2/2) (#177090)
2026-01-23 00:19:03 -08:00
Mips16InstrInfo.h
CodeGen: Remove TRI arguments from stack load/store hooks (#158240)
2025-11-10 16:24:39 -08:00
Mips16InstrInfo.td
[Mips] Remove size operand of LwRxPcTcp16 / LwRxPcTcpX16 (#157348)
2025-09-14 10:56:51 +08:00
Mips16ISelDAGToDAG.cpp
…
Mips16ISelDAGToDAG.h
…
Mips16ISelLowering.cpp
CodeGen: Move libcall lowering configuration to subtarget (#168621)
2025-11-25 11:59:56 -05:00
Mips16ISelLowering.h
CodeGen: Move libcall lowering configuration to subtarget (#168621)
2025-11-25 11:59:56 -05:00
Mips16RegisterInfo.cpp
CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)
2025-09-12 09:18:50 +00:00
Mips16RegisterInfo.h
CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)
2025-09-12 09:18:50 +00:00
Mips32r6InstrFormats.td
…
Mips32r6InstrInfo.td
MIPSr6: Set FSELECT Legal for f64 (#173591)
2025-12-26 18:49:41 +08:00
Mips64InstrInfo.td
[Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (#176666)
2026-01-28 04:32:59 -05:00
Mips64r6InstrInfo.td
[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)
2026-02-04 17:35:21 +00:00
Mips.h
…
Mips.td
[Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (#176666)
2026-01-28 04:32:59 -05:00
MipsAnalyzeImmediate.cpp
…
MipsAnalyzeImmediate.h
…
MipsAsmPrinter.cpp
[X86][WinEH] Insert nop after unwinding inline assembly (#176393)
2026-01-19 09:09:04 +01:00
MipsAsmPrinter.h
[X86][WinEH] Insert nop after unwinding inline assembly (#176393)
2026-01-19 09:09:04 +01:00
MipsBranchExpansion.cpp
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
MipsCallingConv.td
[MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (#140575)
2025-09-28 10:49:40 +08:00
MipsCallLowering.cpp
[AMDGPU] Insert readfirstlane for uniform VGPR arguments (#178198)
2026-03-03 10:11:25 +08:00
MipsCallLowering.h
…
MipsCCState.cpp
[Mips] Remove custom "original type" handling (#154082)
2025-08-19 09:26:38 +02:00
MipsCCState.h
[Mips] Remove custom "original type" handling (#154082)
2025-08-19 09:26:38 +02:00
MipsCombine.td
…
MipsCondMov.td
…
MipsConstantIslandPass.cpp
[Mips] Use getSigned() for LwConstant32 immedate
2025-12-16 09:28:33 +01:00
MipsDelaySlotFiller.cpp
[Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (#176666)
2026-01-28 04:32:59 -05:00
MipsDSPInstrFormats.td
…
MipsDSPInstrInfo.td
[Mips] TableGen-erate SDNode descriptions (#168307)
2025-12-05 14:53:14 +00:00
MipsEVAInstrFormats.td
…
MipsEVAInstrInfo.td
…
MipsExpandPseudo.cpp
[Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (#159717)
2025-09-25 23:29:13 -04:00
MipsFastISel.cpp
[MIPS] Fix argument size in Fast ISel (#180336)
2026-02-09 21:36:35 +08:00
MipsFrameLowering.cpp
…
MipsFrameLowering.h
…
MipsInstrCompiler.td
…
MipsInstrFormats.td
[Target] Remove SoftFail field on targets that don't use it (NFC) (#154659)
2025-08-21 05:21:42 +03:00
MipsInstrFPU.td
[Mips] Remove NoNaNsFPMath uses (#183045)
2026-02-26 18:49:16 +08:00
MipsInstrInfo.cpp
CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)
2025-11-10 22:40:39 +00:00
MipsInstrInfo.h
[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subreg-reload (#175581)
2026-01-13 08:21:58 +05:30
MipsInstrInfo.td
[Mips] Remove NoNaNsFPMath uses (#183045)
2026-02-26 18:49:16 +08:00
MipsInstructionSelector.cpp
[NFC][LLVM] Make MachineInstrBuilder::constrainAllUses return void (#179632)
2026-02-04 12:06:10 +01:00
MipsISelDAGToDAG.cpp
…
MipsISelDAGToDAG.h
…
MipsISelLowering.cpp
[Mips] Remove NoNaNsFPMath uses (#183045)
2026-02-26 18:49:16 +08:00
MipsISelLowering.h
FastISel: Thread LibcallLoweringInfo through (#176799)
2026-01-19 20:44:48 +00:00
MipsLegalizerInfo.cpp
[NFC][LLVM] Make MachineInstrBuilder::constrainAllUses return void (#179632)
2026-02-04 12:06:10 +01:00
MipsLegalizerInfo.h
…
MipsMachineFunction.cpp
…
MipsMachineFunction.h
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MipsMCInstLower.cpp
MIPS: Replace MipsMCExpr with MCSpecifierExpr
2025-06-17 09:36:53 -07:00
MipsMCInstLower.h
MIPS: Reduce MipsMCExpr uses
2025-06-15 18:46:51 -07:00
MipsModuleISelDAGToDAG.cpp
…
MipsMSAInstrFormats.td
…
MipsMSAInstrInfo.td
[Mips] TableGen-erate SDNode descriptions (#168307)
2025-12-05 14:53:14 +00:00
MipsMTInstrFormats.td
…
MipsMTInstrInfo.td
MIPSr6: Set FSELECT Legal for f64 (#173591)
2025-12-26 18:49:41 +08:00
MipsMulMulBugPass.cpp
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MipsOptimizePICCall.cpp
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MipsOptionRecord.h
[Mips] Remove implicit conversions of MCRegister to unsigned. NFC (#167645)
2025-11-12 08:43:55 -08:00
MipsOs16.cpp
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MipsPfmCounters.td
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MipsPostLegalizerCombiner.cpp
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MipsPreLegalizerCombiner.cpp
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MipsRegisterBankInfo.cpp
[Mips] Add support for Mips::GPR64Idx in MipsRegisterBankInfo (#173534)
2025-12-26 18:49:55 +08:00
MipsRegisterBankInfo.h
[Mips] Add support for Mips::GPR64Idx in MipsRegisterBankInfo (#173534)
2025-12-26 18:49:55 +08:00
MipsRegisterBanks.td
[Mips] Add support for Mips::GPR64Idx in MipsRegisterBankInfo (#173534)
2025-12-26 18:49:55 +08:00
MipsRegisterInfo.cpp
[mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (#170322)
2025-12-18 23:06:36 +01:00
MipsRegisterInfo.h
Mips: Switch to RegClassByHwMode (#158273)
2025-09-19 13:50:07 +00:00
MipsRegisterInfo.td
MIPSr6: Set FSELECT Legal for f64 (#173591)
2025-12-26 18:49:41 +08:00
MipsSchedule.td
…
MipsScheduleGeneric.td
…
MipsScheduleI6400.td
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MipsScheduleP5600.td
…
MipsSEFrameLowering.cpp
[NFC][MI] Tidy Up RegState enum use (2/2) (#177090)
2026-01-23 00:19:03 -08:00
MipsSEFrameLowering.h
…
MipsSEInstrInfo.cpp
MIPS: readsWritesFloatRegister, inc Idx for continue (#179932)
2026-02-06 08:15:01 +08:00
MipsSEInstrInfo.h
CodeGen: Remove TRI arguments from stack load/store hooks (#158240)
2025-11-10 16:24:39 -08:00
MipsSEISelDAGToDAG.cpp
[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)
2026-02-04 17:35:21 +00:00
MipsSEISelDAGToDAG.h
…
MipsSEISelLowering.cpp
[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)
2026-02-04 17:35:21 +00:00
MipsSEISelLowering.h
…
MipsSelectionDAGInfo.cpp
[Mips] TableGen-erate SDNode descriptions (#168307)
2025-12-05 14:53:14 +00:00
MipsSelectionDAGInfo.h
[Mips] TableGen-erate SDNode descriptions (#168307)
2025-12-05 14:53:14 +00:00
MipsSERegisterInfo.cpp
CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)
2025-09-12 09:18:50 +00:00
MipsSERegisterInfo.h
CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)
2025-09-12 09:18:50 +00:00
MipsSubtarget.cpp
[Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (#176666)
2026-01-28 04:32:59 -05:00
MipsSubtarget.h
[Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (#176666)
2026-01-28 04:32:59 -05:00
MipsTargetMachine.cpp
[llvm] Move data layout string computation to TargetParser (#157612)
2025-09-11 11:05:29 -07:00
MipsTargetMachine.h
…
MipsTargetObjectFile.cpp
[RISCV] Put Large Code Model Constant Pools in .text (#151393)
2026-03-02 13:17:06 -08:00
MipsTargetObjectFile.h
[RISCV] Put Large Code Model Constant Pools in .text (#151393)
2026-03-02 13:17:06 -08:00
MipsTargetTransformInfo.cpp
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MipsTargetTransformInfo.h
[CostModel] Mark all TTIImpls as final. NFC (#143404)
2025-06-15 08:51:59 +01:00
MSA.txt
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Relocation.txt
…