Craig Topper f146677396

[TargetLowering] Refactor expandDIVREMByConstant to share more code. NFC (#187582) ...

Make the (1 << HBitWidth) % Divisor == 1 path a special case within
the recently added chunk summing algorithm. This allows us to
share the trailing zero shifting code.

While there make some comment improvements and avoid creating
unnecessary nodes.

2026-03-21 11:23:16 -07:00

..

CMakeLists.txt

…

DAGCombiner.cpp

[DAGCombine] Optimize away cond ? 1 : 0 post-legalization (#186771)

2026-03-20 16:23:18 +01:00

FastISel.cpp

[FastISel] generate FAKE_USE for llvm.fake.use (#187116)

2026-03-19 14:06:26 +01:00

FunctionLoweringInfo.cpp

[NFC][CodeGen] Use getAllocationSize instead of manual size computation (#178360)

2026-01-28 22:48:13 -05:00

InstrEmitter.cpp

DAG: Replace legal type check in EmitCopyFromReg (#177788)

2026-03-05 13:08:39 +01:00

InstrEmitter.h

…

LegalizeDAG.cpp

[CodeGen] Improve getLoadExtAction and friends (#181104)

2026-03-17 23:40:19 -07:00

LegalizeFloatTypes.cpp

[SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (#179318)

2026-03-04 10:40:47 +01:00

LegalizeIntegerTypes.cpp

[SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (#185600)

2026-03-16 14:39:35 +08:00

LegalizeTypes.cpp

[SelectionDAG] Fix cycle in ReplacedValues during type legalization (#184697)

2026-03-05 09:37:59 -08:00

LegalizeTypes.h

[SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (#185600)

2026-03-16 14:39:35 +08:00

LegalizeTypesGeneric.cpp

[LLVM][DAGCombiner] Look through freeze when combining extensions of loads (#175022)

2026-01-29 12:01:43 +00:00

LegalizeVectorOps.cpp

[CodeGen] Improve getLoadExtAction and friends (#181104)

2026-03-17 23:40:19 -07:00

LegalizeVectorTypes.cpp

[SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (#179318)

2026-03-04 10:40:47 +01:00

MatchContext.h

…

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

…

ScheduleDAGRRList.cpp

CodeGen: Remove TRI argument from getRegClass (#158225)

2025-11-10 15:43:55 -08:00

ScheduleDAGSDNodes.cpp

DAG: Remove TargetLowering::checkForPhysRegDependency (#161787)

2025-10-03 15:58:51 +00:00

ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

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SDNodeDbgValue.h

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SDNodeInfo.cpp

[SelectionDAG] Verify SDTCisVT and SDTCVecEltisVT constraints (#150125)

2025-11-16 18:26:03 +03:00

SelectionDAG.cpp

Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (#182562)

2026-03-14 18:49:08 +00:00

SelectionDAGAddressAnalysis.cpp

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SelectionDAGBuilder.cpp

[atomicrmw] fminimumnum/fmaximumnum support (#187030)

2026-03-18 09:35:49 +01:00

SelectionDAGBuilder.h

[CodeGen] Drop uses of BranchInst (#186391)

2026-03-13 21:51:38 +00:00

SelectionDAGDumper.cpp

[DAG] Add back SelectionDAG::dump() without parameter (#187001)

2026-03-18 18:34:03 +08:00

SelectionDAGISel.cpp

[TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (#182686)

2026-02-21 23:03:56 -08:00

SelectionDAGPrinter.cpp

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SelectionDAGTargetInfo.cpp

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StatepointLowering.cpp

DAG: Get libcall info from LibcallLowering in more places (#176836)

2026-01-20 12:47:22 +01:00

StatepointLowering.h

…

TargetLowering.cpp

[TargetLowering] Refactor expandDIVREMByConstant to share more code. NFC (#187582)

2026-03-21 11:23:16 -07:00