9e355c8ec3
Per SPIR-V spec alignment is 32-bit integer, so it should be encoded as i8 in the intrinsics' def.
22 lines
766 B
LLVM
22 lines
766 B
LLVM
; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: %[[#VEC:]] = OpTypeVector %[[#]] 4
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; CHECK-DAG: %[[#PTR:]] = OpTypePointer CrossWorkgroup %[[#VEC]]
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; CHECK-DAG: %[[#NULL:]] = OpConstantNull %[[#VEC]]
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; CHECK: OpStore %[[#]] %[[#NULL]] Aligned 256
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; CHECK: OpLoad %[[#VEC]] %[[#]] Aligned 256
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define spir_func void @test_store_align256(ptr addrspace(1) %p) addrspace(4) {
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entry:
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store <4 x i64> zeroinitializer, ptr addrspace(1) %p, align 256
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ret void
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}
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define spir_func <4 x i64> @test_load_align256(ptr addrspace(1) %p) addrspace(4) {
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entry:
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%v = load <4 x i64>, ptr addrspace(1) %p, align 256
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ret <4 x i64> %v
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}
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