96f54de8ff
This commit teaches InstCombine how to replace an atomicrmw operation into a simple load atomic. For a given `atomicrmw <op>`, this is possible when: 1. The ordering of that operation is compatible with a load (i.e., anything that doesn't have a release semantic). 2. <op> does not modify the value being stored Differential Revision: https://reviews.llvm.org/D57854 llvm-svn: 353471
49 lines
1.7 KiB
C++
49 lines
1.7 KiB
C++
//===- InstCombineAtomicRMW.cpp -------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the visit functions for atomic rmw instructions.
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//
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//===----------------------------------------------------------------------===//
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#include "InstCombineInternal.h"
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#include "llvm/IR/Instructions.h"
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using namespace llvm;
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Instruction *InstCombiner::visitAtomicRMWInst(AtomicRMWInst &RMWI) {
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switch (RMWI.getOperation()) {
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default:
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break;
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case AtomicRMWInst::Add:
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case AtomicRMWInst::Sub:
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case AtomicRMWInst::Or:
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// Replace atomicrmw <op> addr, 0 => load atomic addr.
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// Volatile RMWs perform a load and a store, we cannot replace
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// this by just a load.
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if (RMWI.isVolatile())
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break;
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auto *CI = dyn_cast<ConstantInt>(RMWI.getValOperand());
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if (!CI || !CI->isZero())
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break;
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// Check if the required ordering is compatible with an
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// atomic load.
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AtomicOrdering Ordering = RMWI.getOrdering();
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assert(Ordering != AtomicOrdering::NotAtomic &&
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Ordering != AtomicOrdering::Unordered &&
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"AtomicRMWs don't make sense with Unordered or NotAtomic");
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if (Ordering != AtomicOrdering::Acquire &&
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Ordering != AtomicOrdering::Monotonic)
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break;
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LoadInst *Load = new LoadInst(RMWI.getType(), RMWI.getPointerOperand());
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Load->setAtomic(Ordering, RMWI.getSyncScopeID());
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return Load;
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}
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return nullptr;
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}
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