Chad Rosier d9d0f86a79 [AArch64] Generate vector signed/unsigned mul and mla/mls long. ...

Phabricator Revision: http://reviews.llvm.org/D5589
Patch by Balaram Makam <bmakam@codeaurora.org>!!

llvm-svn: 219276

2014-10-08 02:31:24 +00:00

..

AArch64

[AArch64] Generate vector signed/unsigned mul and mla/mls long.

2014-10-08 02:31:24 +00:00

ARM

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

Hexagon

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

Inputs

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

Mips

[mips] Return {f128} correctly for N32/N64.

2014-10-07 09:29:59 +00:00

MSP430

Drop the W postfix on the 16-bit registers.

2014-09-10 06:58:14 +00:00

NVPTX

Revert r216862 due to a performance regression

2014-10-01 15:22:13 +00:00

PowerPC

Fast-math fold: x / (y * sqrt(z)) -> x * (rsqrt(z) / y)

2014-10-06 19:31:18 +00:00

R600

R600/SI: Remove assertion in SIInstrInfo::areLoadsFromSameBasePtr()

2014-10-07 21:09:20 +00:00

SPARC

Add back tests for empty function in SPARC and PowerPC.

2014-09-15 22:11:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

Thumb2

[ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5

2014-10-01 13:13:18 +00:00

X86

[X86] Fix a bug with fetch_add(INT32_MIN)

2014-10-07 23:53:57 +00:00

XCore

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00