cba5f1b6c1
These are the instructions from page 8 and the second half of page 9 here in https://jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf Co-authored-by: realqhc <caiqihan021@hotmail.com>
295 lines
10 KiB
TableGen
295 lines
10 KiB
TableGen
//===-- RISCVInstrInfoP.td - RISC-V 'P' instructions -------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the RISC-V instructions from the standard 'Base P'
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// Packed SIMD instruction set extension.
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//
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// This version is still experimental as the 'P' extension hasn't been
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// ratified yet.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Operand and SDNode transformation definitions.
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//===----------------------------------------------------------------------===//
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def simm10 : RISCVSImmLeafOp<10>;
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def SImm10UnsignedAsmOperand : SImmAsmOperand<10, "Unsigned"> {
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let RenderMethod = "addSImm10UnsignedOperands";
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}
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// A 10-bit signed immediate allowing range [-512, 1023]
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// but represented as [-512, 511].
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def simm10_unsigned : RISCVOp {
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let ParserMatchClass = SImm10UnsignedAsmOperand;
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let EncoderMethod = "getImmOpValue";
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let DecoderMethod = "decodeSImmOperand<10>";
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let OperandType = "OPERAND_SIMM10";
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let MCOperandPredicate = [{
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int64_t Imm;
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if (!MCOp.evaluateAsConstantImm(Imm))
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return false;
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return isInt<10>(Imm);
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}];
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}
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//===----------------------------------------------------------------------===//
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// Instruction class templates
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//===----------------------------------------------------------------------===//
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class PLI_i<bits<7> funct7, string opcodestr>
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: RVInst<(outs GPR:$rd), (ins simm10:$imm10), opcodestr, "$rd, $imm10", [],
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InstFormatOther> {
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bits<10> imm10;
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bits<5> rd;
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let Inst{31-25} = funct7;
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let Inst{24-16} = imm10{8-0};
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let Inst{15} = imm10{9};
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let Inst{14-12} = 0b010;
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let Inst{11-7} = rd;
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let Inst{6-0} = OPC_OP_IMM_32.Value;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class PLUI_i<bits<7> funct7, string opcodestr>
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: RVInst<(outs GPR:$rd), (ins simm10_unsigned:$imm10), opcodestr,
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"$rd, $imm10", [], InstFormatOther> {
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bits<10> imm10;
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bits<5> rd;
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let Inst{31-25} = funct7;
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let Inst{24} = imm10{0};
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let Inst{23-15} = imm10{9-1};
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let Inst{14-12} = 0b010;
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let Inst{11-7} = rd;
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let Inst{6-0} = OPC_OP_IMM_32.Value;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class PLI_B_i<bits<8> funct8, string opcodestr>
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: RVInst<(outs GPR:$rd), (ins uimm8:$uimm8), opcodestr, "$rd, $uimm8", [],
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InstFormatOther> {
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bits<8> uimm8;
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bits<5> rd;
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let Inst{31-24} = funct8;
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let Inst{23-16} = uimm8;
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let Inst{15} = 0b0;
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let Inst{14-12} = 0b010;
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let Inst{11-7} = rd;
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let Inst{6-0} = OPC_OP_IMM_32.Value;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class RVPShift_ri<bits<3> f, bits<3> funct3, string opcodestr, Operand ImmType>
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: RVInstIBase<funct3, OPC_OP_IMM_32, (outs GPR:$rd),
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(ins GPR:$rs1, ImmType:$shamt), opcodestr,
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"$rd, $rs1, $shamt"> {
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let Inst{31} = 0b1;
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let Inst{30-28} = f;
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let Inst{27} = 0b0;
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}
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class RVPShiftD_ri<bits<3> f, bits<3> funct3, string opcodestr>
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: RVPShift_ri<f, funct3, opcodestr, uimm6> {
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bits<6> shamt;
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let Inst{26} = 0b1;
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let Inst{25-20} = shamt;
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}
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class RVPShiftW_ri<bits<3> f, bits<3> funct3, string opcodestr>
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: RVPShift_ri<f, funct3, opcodestr, uimm5> {
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bits<5> shamt;
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let Inst{26-25} = 0b01;
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let Inst{24-20} = shamt;
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}
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class RVPShiftH_ri<bits<3> f, bits<3> funct3, string opcodestr>
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: RVPShift_ri<f, funct3, opcodestr, uimm4> {
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bits<4> shamt;
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let Inst{26-24} = 0b001;
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let Inst{23-20} = shamt;
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}
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class RVPShiftB_ri<bits<3> f, bits<3> funct3, string opcodestr>
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: RVPShift_ri<f, funct3, opcodestr, uimm3> {
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bits<3> shamt;
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let Inst{26-23} = 0b0001;
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let Inst{22-20} = shamt;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class RVPUnary_ri<bits<2> w, bits<5> uf, string opcodestr>
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: RVInstIBase<0b010, OPC_OP_IMM_32, (outs GPR:$rd), (ins GPR:$rs1),
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opcodestr, "$rd, $rs1"> {
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let Inst{31-27} = 0b11100;
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let Inst{26-25} = w;
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let Inst{24-20} = uf;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class RVPBinaryScalar_rr<bits<3> f, bits<2> w, bits<3> funct3, string opcodestr>
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: RVInstRBase<funct3, OPC_OP_IMM_32, (outs GPR:$rd),
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(ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2"> {
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let Inst{31} = 0b1;
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let Inst{30-28} = f;
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let Inst{27} = 0b1;
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let Inst{26-25} = w;
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}
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//===----------------------------------------------------------------------===//
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// Instructions
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//===----------------------------------------------------------------------===//
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let Predicates = [HasStdExtP] in {
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let IsSignExtendingOpW = 1 in
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def CLS : Unary_r<0b011000000011, 0b001, "cls">;
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def ABS : Unary_r<0b011000000111, 0b001, "abs">;
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} // Predicates = [HasStdExtP]
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let Predicates = [HasStdExtP, IsRV32] in {
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def REV_RV32 : Unary_r<0b011010011111, 0b101, "rev">;
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} // Predicates = [HasStdExtP, IsRV32]
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let Predicates = [HasStdExtP, IsRV64] in {
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def REV16 : Unary_r<0b011010110000, 0b101, "rev16">;
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def REV_RV64 : Unary_r<0b011010111111, 0b101, "rev">;
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let IsSignExtendingOpW = 1 in {
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def CLSW : UnaryW_r<0b011000000011, 0b001, "clsw">;
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def ABSW : UnaryW_r<0b011000000111, 0b001, "absw">;
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}
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} // Predicates = [HasStdExtP, IsRV64]
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let Predicates = [HasStdExtP] in {
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def PSLLI_B : RVPShiftB_ri<0b000, 0b010, "pslli.b">;
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def PSLLI_H : RVPShiftH_ri<0b000, 0b010, "pslli.h">;
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def PSSLAI_H : RVPShiftH_ri<0b101, 0b010, "psslai.h">;
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} // Predicates = [HasStdExtP]
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let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
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def SSLAI : RVPShiftW_ri<0b101, 0b010, "sslai">;
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} // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
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let Predicates = [HasStdExtP, IsRV64] in {
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def PSLLI_W : RVPShiftW_ri<0b000, 0b010, "pslli.w">;
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def PSSLAI_W : RVPShiftW_ri<0b101, 0b010, "psslai.w">;
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} // Predicates = [HasStdExtP, IsRV64]
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let Predicates = [HasStdExtP] in
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def PLI_H : PLI_i<0b1011000, "pli.h">;
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let Predicates = [HasStdExtP, IsRV64] in
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def PLI_W : PLI_i<0b1011001, "pli.w">;
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let Predicates = [HasStdExtP] in
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def PLI_B : PLI_B_i<0b10110100, "pli.b">;
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let Predicates = [HasStdExtP] in {
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def PSEXT_H_B : RVPUnary_ri<0b00, 0b00100, "psext.h.b">;
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def PSABS_H : RVPUnary_ri<0b00, 0b00111, "psabs.h">;
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def PSABS_B : RVPUnary_ri<0b10, 0b00111, "psabs.b">;
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} // Predicates = [HasStdExtP]
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let Predicates = [HasStdExtP, IsRV64] in {
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def PSEXT_W_B : RVPUnary_ri<0b01, 0b00100, "psext.w.b">;
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def PSEXT_W_H : RVPUnary_ri<0b01, 0b00101, "psext.w.h">;
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} // Predicates = [HasStdExtP, IsRV64]
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let Predicates = [HasStdExtP] in
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def PLUI_H : PLUI_i<0b1111000, "plui.h">;
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let Predicates = [HasStdExtP, IsRV64] in
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def PLUI_W : PLUI_i<0b1111001, "plui.w">;
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let Predicates = [HasStdExtP] in {
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def PSLL_HS : RVPBinaryScalar_rr<0b000, 0b00, 0b010, "psll.hs">;
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def PSLL_BS : RVPBinaryScalar_rr<0b000, 0b10, 0b010, "psll.bs">;
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def PADD_HS : RVPBinaryScalar_rr<0b001, 0b00, 0b010, "padd.hs">;
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def PADD_BS : RVPBinaryScalar_rr<0b001, 0b10, 0b010, "padd.bs">;
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def PSSHA_HS : RVPBinaryScalar_rr<0b110, 0b00, 0b010, "pssha.hs">;
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def PSSHAR_HS : RVPBinaryScalar_rr<0b111, 0b00, 0b010, "psshar.hs">;
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} // Predicates = [HasStdExtP]
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let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
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def SSHA : RVPBinaryScalar_rr<0b110, 0b01, 0b010, "ssha">;
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def SSHAR : RVPBinaryScalar_rr<0b111, 0b01, 0b010, "sshar">;
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} // Predicates = [HasStdExtP, IsRV32]
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let Predicates = [HasStdExtP, IsRV64] in {
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def PSLL_WS : RVPBinaryScalar_rr<0b000, 0b01, 0b010, "psll.ws">;
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def PADD_WS : RVPBinaryScalar_rr<0b001, 0b01, 0b010, "padd.ws">;
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def PSSHA_WS : RVPBinaryScalar_rr<0b110, 0b01, 0b010, "pssha.ws">;
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def SHA : RVPBinaryScalar_rr<0b110, 0b11, 0b010, "sha">;
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def PSSHAR_WS : RVPBinaryScalar_rr<0b111, 0b01, 0b010, "psshar.ws">;
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def SHAR : RVPBinaryScalar_rr<0b111, 0b11, 0b010, "shar">;
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} // Predicates = [HasStdExtP, IsRV64]
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let Predicates = [HasStdExtP] in {
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def PSRLI_B : RVPShiftB_ri<0b000, 0b100, "psrli.b">;
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def PSRLI_H : RVPShiftH_ri<0b000, 0b100, "psrli.h">;
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def PUSATI_H : RVPShiftH_ri<0b010, 0b100, "pusati.h">;
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def PSRAI_B : RVPShiftB_ri<0b100, 0b100, "psrai.b">;
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def PSRAI_H : RVPShiftH_ri<0b100, 0b100, "psrai.h">;
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def PSRARI_H : RVPShiftH_ri<0b101, 0b100, "psrari.h">;
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def PSATI_H : RVPShiftH_ri<0b110, 0b100, "psati.h">;
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} // Predicates = [HasStdExtP]
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let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
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def USATI_RV32 : RVPShiftW_ri<0b010, 0b100, "usati">;
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def SRARI_RV32 : RVPShiftW_ri<0b101, 0b100, "srari">;
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def SATI_RV32 : RVPShiftW_ri<0b110, 0b100, "sati">;
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} // Predicates = [HasStdExtP, IsRV32]
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let Predicates = [HasStdExtP, IsRV64] in {
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def PSRLI_W : RVPShiftW_ri<0b000, 0b100, "psrli.w">;
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def PSRAI_W : RVPShiftW_ri<0b100, 0b100, "psrai.w">;
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def PUSATI_W : RVPShiftW_ri<0b010, 0b100, "pusati.w">;
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def USATI_RV64 : RVPShiftD_ri<0b010, 0b100, "usati">;
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def PSRARI_W : RVPShiftW_ri<0b101, 0b100, "psrari.w">;
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def SRARI_RV64 : RVPShiftD_ri<0b101, 0b100, "srari">;
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def PSATI_W : RVPShiftW_ri<0b110, 0b100, "psati.w">;
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def SATI_RV64 : RVPShiftD_ri<0b110, 0b100, "sati">;
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} // Predicates = [HasStdExtP, IsRV64]
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let Predicates = [HasStdExtP] in {
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def PSRL_HS : RVPBinaryScalar_rr<0b000, 0b00, 0b100, "psrl.hs">;
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def PSRL_BS : RVPBinaryScalar_rr<0b000, 0b10, 0b100, "psrl.bs">;
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def PREDSUM_HS : RVPBinaryScalar_rr<0b001, 0b00, 0b100, "predsum.hs">;
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def PREDSUM_BS : RVPBinaryScalar_rr<0b001, 0b10, 0b100, "predsum.bs">;
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def PREDSUMU_HS : RVPBinaryScalar_rr<0b011, 0b00, 0b100, "predsumu.hs">;
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def PREDSUMU_BS : RVPBinaryScalar_rr<0b011, 0b10, 0b100, "predsumu.bs">;
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def PSRA_HS : RVPBinaryScalar_rr<0b100, 0b00, 0b100, "psra.hs">;
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def PSRA_BS : RVPBinaryScalar_rr<0b100, 0b10, 0b100, "psra.bs">;
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} // Predicates = [HasStdExtP]
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let Predicates = [HasStdExtP, IsRV64] in {
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def PSRL_WS : RVPBinaryScalar_rr<0b000, 0b01, 0b100, "psrl.ws">;
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def PREDSUM_WS : RVPBinaryScalar_rr<0b001, 0b01, 0b100, "predsum.ws">;
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def PREDSUMU_WS : RVPBinaryScalar_rr<0b011, 0b01, 0b100, "predsumu.ws">;
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def PSRA_WS : RVPBinaryScalar_rr<0b100, 0b01, 0b100, "psra.ws">;
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} // Predicates = [HasStdExtP, IsRV64]
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