153 lines
9.2 KiB
YAML
153 lines
9.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# NOTE: This MIR test is required because the support for 64 bit memory ops is missing in X86 mode, Due to distinction between float/int types, support is expected in near future and there is this RFC in place https://discourse.llvm.org/t/rfc-globalisel-adding-fp-type-information-to-llt/83349. Once this support is introduced this test must be dropped and integrated into the LLVM IR tests.
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# RUN: llc -O2 -mtriple=i686-linux-gnu -mattr=+x87,-sse,-sse2 -run-pass=regbankselect,instruction-select -disable-gisel-legality-check -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes GISEL-X86
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---
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name: test_si8tofp64
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alignment: 16
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exposesReturnsTwice: false
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legalized: true
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, type: default, offset: 0, size: 1, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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stack:
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- { id: 0, name: '', type: default, offset: 0, size: 2, alignment: 2,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; GISEL-X86-LABEL: name: test_si8tofp64
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; GISEL-X86: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.1)
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; GISEL-X86-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
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; GISEL-X86-NEXT: MOV16mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s16) into %stack.0)
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; GISEL-X86-NEXT: [[ILD_Fp16m64_:%[0-9]+]]:rfp64 = ILD_Fp16m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s16) from %stack.0)
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; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp16m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))
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; GISEL-X86-NEXT: RET 0
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%4:_(p0) = G_FRAME_INDEX %fixed-stack.0
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%1:_(p0) = G_LOAD %4(p0) :: (invariant load (p0) from %fixed-stack.0)
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%6:_(s16) = IMPLICIT_DEF
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%7:_(p0) = G_FRAME_INDEX %stack.0
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G_STORE %6(s16), %7(p0) :: (store (s16) into %stack.0)
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%5:_(s64) = G_FILD %7(p0) :: (load (s16) from %stack.0)
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G_STORE %5(s64), %1(p0) :: (store (s64))
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RET 0
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...
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---
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name: test_si16tofp64
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alignment: 16
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legalized: true
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, type: default, offset: 0, size: 2, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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stack:
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- { id: 0, name: '', type: default, offset: 0, size: 2, alignment: 2,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; GISEL-X86-LABEL: name: test_si16tofp64
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; GISEL-X86: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
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; GISEL-X86-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.1)
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; GISEL-X86-NEXT: MOV16mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s16) into %stack.0)
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; GISEL-X86-NEXT: [[ILD_Fp16m64_:%[0-9]+]]:rfp64 = ILD_Fp16m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s16) from %stack.0)
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; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp16m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))
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; GISEL-X86-NEXT: RET 0
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%0:_(s16) = IMPLICIT_DEF
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%4:_(p0) = G_FRAME_INDEX %fixed-stack.0
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%1:_(p0) = G_LOAD %4(p0) :: (invariant load (p0) from %fixed-stack.0)
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%6:_(p0) = G_FRAME_INDEX %stack.0
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G_STORE %0(s16), %6(p0) :: (store (s16) into %stack.0)
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%5:_(s64) = G_FILD %6(p0):: (load (s16) from %stack.0)
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G_STORE %5(s64), %1(p0) :: (store (s64))
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RET 0
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...
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---
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name: test_si32tofp64
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alignment: 4
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exposesReturnsTwice: false
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legalized: true
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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stack:
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- { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; GISEL-X86-LABEL: name: test_si32tofp64
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; GISEL-X86: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
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; GISEL-X86-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.1)
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; GISEL-X86-NEXT: MOV32mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s32) into %stack.0)
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; GISEL-X86-NEXT: [[ILD_Fp32m64_:%[0-9]+]]:rfp64 = ILD_Fp32m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s32) from %stack.0)
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; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp32m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))
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; GISEL-X86-NEXT: RET 0
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%0:_(s32) = IMPLICIT_DEF
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%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
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%1:_(p0) = G_LOAD %3(p0) :: (invariant load (p0) from %fixed-stack.0)
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%5:_(p0) = G_FRAME_INDEX %stack.0
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G_STORE %0(s32), %5(p0) :: (store (s32) into %stack.0)
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%4:_(s64) = G_FILD %5(p0) :: (load (s32) from %stack.0)
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G_STORE %4(s64), %1(p0) :: (store (s64))
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RET 0
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...
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---
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name: test_si64tofp64
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alignment: 16
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exposesReturnsTwice: false
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legalized: true
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, type: default, offset: 8, size: 4, alignment: 8, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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stack:
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- { id: 0, name: '', type: default, offset: 0, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; GISEL-X86-LABEL: name: test_si64tofp64
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; GISEL-X86: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
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; GISEL-X86-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
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; GISEL-X86-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.2, 1, $noreg, 0, $noreg :: (invariant load (p0) from %fixed-stack.2, align 8)
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; GISEL-X86-NEXT: [[LEA32r:%[0-9]+]]:gr32 = LEA32r %stack.0, 1, $noreg, 0, $noreg
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; GISEL-X86-NEXT: MOV32mr %stack.0, 1, $noreg, 0, $noreg, [[DEF]] :: (store (s32) into %stack.0, align 8)
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; GISEL-X86-NEXT: MOV32mr [[LEA32r]], 1, $noreg, 4, $noreg, [[DEF1]] :: (store (s32) into %stack.0 + 4, basealign 8)
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; GISEL-X86-NEXT: [[ILD_Fp64m64_:%[0-9]+]]:rfp64 = ILD_Fp64m64 %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (load (s64) from %stack.0)
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; GISEL-X86-NEXT: nofpexcept ST_Fp64m [[MOV32rm]], 1, $noreg, 0, $noreg, [[ILD_Fp64m64_]], implicit-def dead $fpsw, implicit $fpcw :: (store (s64))
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; GISEL-X86-NEXT: RET 0
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%2:_(s32) = IMPLICIT_DEF
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%3:_(s32) = IMPLICIT_DEF
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%6:_(p0) = G_FRAME_INDEX %fixed-stack.0
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%1:_(p0) = G_LOAD %6(p0) :: (invariant load (p0) from %fixed-stack.0, align 8)
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%8:_(p0) = G_FRAME_INDEX %stack.0
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G_STORE %2(s32), %8(p0) :: (store (s32) into %stack.0, align 8)
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%12:_(s32) = G_CONSTANT i32 4
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%11:_(p0) = G_PTR_ADD %8, %12(s32)
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G_STORE %3(s32), %11(p0) :: (store (s32) into %stack.0 + 4, basealign 8)
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%7:_(s64) = G_FILD %8(p0) :: (load (s64) from %stack.0)
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G_STORE %7(s64), %1(p0) :: (store (s64))
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RET 0
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