
FPSCR and FPEXC will be stored in FPStatusRegs, after GPRCS2 has been saved. - GPRCS1 - GPRCS2 - FPStatusRegs (new) - DPRCS - GPRCS3 - DPRCS2 FPSCR is present on all targets with a VFP, but the FPEXC register is not present on Cortex-M devices, so different amounts of bytes are being pushed onto the stack depending on our target, which would affect alignment for subsequent saves. DPRCS1 will sum up all previous bytes that were saved, and will emit extra instructions to ensure that its alignment is correct. My assumption is that if DPRCS1 is able to correct its alignment to be correct, then all subsequent saves will also have correct alignment. Avoid annotating the saving of FPSCR and FPEXC for functions marked with the interrupt_save_fp attribute, even though this is done as part of frame setup. Since these are status registers, there really is no viable way of annotating this. Since these aren't GPRs or DPRs, they can't be used with .save or .vsave directives. Instead, just record that the intermediate registers r4 and r5 are saved to the stack again. Co-authored-by: Jake Vossen <jake@vossen.dev> Co-authored-by: Alan Phipps <a-phipps@ti.com>
35 lines
1.4 KiB
C
35 lines
1.4 KiB
C
// REQUIRES: arm-registered-target
|
|
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r5 -mfpu=vfpv3-d16 -marm -S -o - %s \
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-R
|
|
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r5 -mfpu=vfpv3-d16 -mthumb -S -o - %s \
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-R
|
|
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r4 -mfpu=vfpv3-d16 -marm -S -o - %s \
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-R
|
|
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-r4 -mfpu=vfpv3-d16 -mthumb -S -o - %s \
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-R
|
|
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -S -o - %s \
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-M
|
|
// RUN: %clang -target arm-none-none-eabihf -mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -S -o - %s \
|
|
// RUN: | FileCheck %s --check-prefix=CHECK-M
|
|
|
|
void bar();
|
|
|
|
__attribute__((interrupt_save_fp)) void test_generic_interrupt() {
|
|
// CHECK-R: vmrs r4, fpscr
|
|
// CHECK-R-NEXT: vmrs r5, fpexc
|
|
// CHECK-R-NEXT: .save {r4, r5}
|
|
// CHECK-R-NEXT: push {r4, r5}
|
|
// .....
|
|
// CHECK-R: pop {r4, r5}
|
|
// CHECK-R-NEXT: vmsr fpscr, r4
|
|
// CHECK-R-NEXT: vmsr fpexc, r5
|
|
|
|
// CHECK-M: vmrs r4, fpscr
|
|
// CHECK-M-NEXT: .save {r4}
|
|
// CHECK-M-NEXT: push {r4}
|
|
// .....
|
|
// CHECK-M: pop {r4}
|
|
// CHECK-M-NEXT: vmsr fpscr, r4
|
|
bar();
|
|
}
|