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llvm-project/llvm/lib/Target/AMDGPU
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Matt Arsenault 0a3ac1be43 AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM 
Although the basic s_load_* instructions happen to use the same
opcode, some of the special case SMRD instructions have
different opcodes.

llvm-svn: 245775
2015-08-22 00:54:31 +00:00
..
AsmParser
AMDGPU: Implement AMDGPUOperand::print()
2015-08-08 00:41:51 +00:00
InstPrinter
…
MCTargetDesc
Add missing include guard.
2015-08-16 07:55:08 +00:00
TargetInfo
…
Utils
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
AMDGPU.h
AMDGPU: Add pass to lower OpenCL image and sampler arguments.
2015-08-07 23:19:30 +00:00
AMDGPU.td
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPU: Minor cleanups to always inline pass
2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU/SI: Fix printing useless info with amdhsa
2015-08-15 00:12:39 +00:00
AMDGPUAsmPrinter.h
AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()
2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td
…
AMDGPUFrameLowering.cpp
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUFrameLowering.h
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUInstrInfo.cpp
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUInstrInfo.h
MIR Serialization: Serialize the target index machine operands.
2015-07-28 23:02:45 +00:00
AMDGPUInstrInfo.td
…
AMDGPUInstructions.td
…
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
…
AMDGPUISelDAGToDAG.cpp
PseudoSourceValue: Replace global manager with a manager in a machine function.
2015-08-11 23:09:45 +00:00
AMDGPUISelLowering.cpp
[TLI] Refactor "is integer division cheap" queries.
2015-08-19 11:17:59 +00:00
AMDGPUISelLowering.h
[AMDGPU] Use the general SMAX/SMIN/UMAX/UMIN pattern matching and remove the AMDGPU implementation
2015-08-13 21:40:02 +00:00
AMDGPUMachineFunction.cpp
…
AMDGPUMachineFunction.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
AMDGPUMCInstLower.cpp
Remove and forbid raw_svector_ostream::flush() calls.
2015-08-13 18:12:56 +00:00
AMDGPUMCInstLower.h
…
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPU/SI: Another attempt to fix Windows bots broken by r244372
2015-08-08 01:11:07 +00:00
AMDGPUPromoteAlloca.cpp
De-constify pointers to Type since they can't be modified. NFC
2015-08-01 22:20:21 +00:00
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h
…
AMDGPURegisterInfo.td
AMDGPU: Set SubRegIndex size and offset
2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUSubtarget.h
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges
2015-08-22 00:19:34 +00:00
AMDGPUTargetMachine.h
…
AMDGPUTargetTransformInfo.cpp
…
AMDGPUTargetTransformInfo.h
Make TargetTransformInfo keeping a reference to the Module DataLayout
2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp
AMDGPU/R600: Remove unused variable
2015-07-16 16:13:34 +00:00
AMDKernelCodeT.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
CaymanInstructions.td
…
CIInstructions.td
AMDGPU: Improve accuracy of instruction rates for some FP instructions
2015-08-22 00:50:41 +00:00
CMakeLists.txt
AMDGPU: Add pass to lower OpenCL image and sampler arguments.
2015-08-07 23:19:30 +00:00
EvergreenInstructions.td
…
LLVMBuild.txt
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Makefile
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Processors.td
AMDGPU/SI: Add Fiji support
2015-08-06 19:43:02 +00:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
…
R600Defines.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr
2015-06-25 13:28:24 +00:00
R600InstrInfo.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600Instructions.td
…
R600Intrinsics.td
…
R600ISelLowering.cpp
Add missing break in switch case in R600ISelLowering
2015-07-16 06:23:12 +00:00
R600ISelLowering.h
Make TargetLowering::getPointerTy() taking DataLayout as an argument
2015-07-09 02:09:04 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600Packetizer.cpp
…
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[PM/AA] Remove all of the dead AliasAnalysis pointers being threaded
2015-07-22 09:52:54 +00:00
SIDefines.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp
…
SIFixSGPRCopies.cpp
…
SIFixSGPRLiveRanges.cpp
AMDGPU: Use DFS to avoid second loop over function
2015-08-22 00:43:38 +00:00
SIFoldOperands.cpp
AMDGPU/SI: Select mad patterns to v_mac_f32
2015-07-13 15:47:57 +00:00
SIInsertWaits.cpp
AMDGPU/SI: Better handle s_wait insertion
2015-08-21 22:47:27 +00:00
SIInstrFormats.td
AMDGPU/SI: Remove VCCReg
2015-08-08 00:41:48 +00:00
SIInstrInfo.cpp
Fix some comment typos.
2015-08-08 18:27:36 +00:00
SIInstrInfo.h
AMDGPU/SI: Remove EXECReg
2015-08-05 16:42:57 +00:00
SIInstrInfo.td
AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM
2015-08-22 00:54:31 +00:00
SIInstructions.td
AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM
2015-08-22 00:54:31 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
Fix some comment typos.
2015-08-08 18:27:36 +00:00
SIISelLowering.h
AMDGPU: Assume SMRD access for constant address space
2015-08-07 20:18:34 +00:00
SILoadStoreOptimizer.cpp
AMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp
AMDGPU/SI: Remove VCCReg
2015-08-08 00:41:48 +00:00
SILowerI1Copies.cpp
…
SIMachineFunctionInfo.cpp
MachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 17:52:07 +00:00
SIMachineFunctionInfo.h
…
SIPrepareScratchRegs.cpp
MachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 17:52:07 +00:00
SIRegisterInfo.cpp
MachineRegisterInfo: Introduce isPhysRegUsed()
2015-08-18 18:54:27 +00:00
SIRegisterInfo.h
…
SIRegisterInfo.td
AMDGPU/SI: Remove VCCReg
2015-08-08 00:41:48 +00:00
SISchedule.td
…
SIShrinkInstructions.cpp
AMDGPU/SI: Remove VCCReg
2015-08-08 00:41:48 +00:00
SITypeRewriter.cpp
…
VIInstrFormats.td
…
VIInstructions.td
AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
2015-07-20 14:28:41 +00:00