d313614b60
Since https://github.com/ARM-software/acle/pull/276 the ACLE defines attributes to better describe the use of a given SME state. Previously the attributes merely described the possibility of it being 'shared' or 'preserved', whereas the new attributes have more semantics and also describe how the data flows through the program. For ZT0 we already had to add new LLVM IR attributes: * aarch64_new_zt0 * aarch64_in_zt0 * aarch64_out_zt0 * aarch64_inout_zt0 * aarch64_preserves_zt0 We have now done the same for ZA, such that we add: * aarch64_new_za (previously `aarch64_pstate_za_new`) * aarch64_in_za (more specific variation of `aarch64_pstate_za_shared`) * aarch64_out_za (more specific variation of `aarch64_pstate_za_shared`) * aarch64_inout_za (more specific variation of `aarch64_pstate_za_shared`) * aarch64_preserves_za (previously `aarch64_pstate_za_shared, aarch64_pstate_za_preserved`) This explicitly removes 'pstate' from the name, because with SME2 and the new ACLE attributes there is a difference between "sharing ZA" (sharing the ZA matrix register with the caller) and "sharing PSTATE.ZA" (sharing either the ZA or ZT0 register, both part of PSTATE.ZA with the caller).
172 lines
6.2 KiB
LLVM
172 lines
6.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 -mattr=+sme < %s | FileCheck %s
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declare void @private_za_callee()
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declare float @llvm.cos.f32(float)
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; Test lazy-save mechanism for a single callee.
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define void @test_lazy_save_1_callee() nounwind "aarch64_inout_za" {
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; CHECK-LABEL: test_lazy_save_1_callee:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-NEXT: mov x29, sp
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: msub x9, x8, x8, x9
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; CHECK-NEXT: mov sp, x9
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; CHECK-NEXT: sub x10, x29, #16
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; CHECK-NEXT: stur wzr, [x29, #-4]
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; CHECK-NEXT: sturh wzr, [x29, #-6]
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; CHECK-NEXT: stur x9, [x29, #-16]
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; CHECK-NEXT: sturh w8, [x29, #-8]
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; CHECK-NEXT: msr TPIDR2_EL0, x10
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; CHECK-NEXT: bl private_za_callee
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; CHECK-NEXT: smstart za
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; CHECK-NEXT: mrs x8, TPIDR2_EL0
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; CHECK-NEXT: sub x0, x29, #16
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; CHECK-NEXT: cbnz x8, .LBB0_2
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; CHECK-NEXT: // %bb.1:
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; CHECK-NEXT: bl __arm_tpidr2_restore
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: msr TPIDR2_EL0, xzr
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; CHECK-NEXT: mov sp, x29
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; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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call void @private_za_callee()
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ret void
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}
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; Test lazy-save mechanism for multiple callees.
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define void @test_lazy_save_2_callees() nounwind "aarch64_inout_za" {
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; CHECK-LABEL: test_lazy_save_2_callees:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: mov x29, sp
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: rdsvl x19, #1
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; CHECK-NEXT: mov x8, sp
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; CHECK-NEXT: msub x8, x19, x19, x8
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; CHECK-NEXT: mov sp, x8
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; CHECK-NEXT: sub x20, x29, #16
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; CHECK-NEXT: stur wzr, [x29, #-4]
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; CHECK-NEXT: sturh wzr, [x29, #-6]
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; CHECK-NEXT: stur x8, [x29, #-16]
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; CHECK-NEXT: sturh w19, [x29, #-8]
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; CHECK-NEXT: msr TPIDR2_EL0, x20
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; CHECK-NEXT: bl private_za_callee
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; CHECK-NEXT: smstart za
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; CHECK-NEXT: mrs x8, TPIDR2_EL0
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; CHECK-NEXT: sub x0, x29, #16
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; CHECK-NEXT: cbnz x8, .LBB1_2
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; CHECK-NEXT: // %bb.1:
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; CHECK-NEXT: bl __arm_tpidr2_restore
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; CHECK-NEXT: .LBB1_2:
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; CHECK-NEXT: msr TPIDR2_EL0, xzr
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; CHECK-NEXT: sturh w19, [x29, #-8]
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; CHECK-NEXT: msr TPIDR2_EL0, x20
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; CHECK-NEXT: bl private_za_callee
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; CHECK-NEXT: smstart za
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; CHECK-NEXT: mrs x8, TPIDR2_EL0
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; CHECK-NEXT: sub x0, x29, #16
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; CHECK-NEXT: cbnz x8, .LBB1_4
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; CHECK-NEXT: // %bb.3:
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; CHECK-NEXT: bl __arm_tpidr2_restore
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; CHECK-NEXT: .LBB1_4:
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; CHECK-NEXT: msr TPIDR2_EL0, xzr
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; CHECK-NEXT: mov sp, x29
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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call void @private_za_callee()
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call void @private_za_callee()
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ret void
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}
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; Test a call of an intrinsic that gets expanded to a library call.
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define float @test_lazy_save_expanded_intrinsic(float %a) nounwind "aarch64_inout_za" {
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; CHECK-LABEL: test_lazy_save_expanded_intrinsic:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-NEXT: mov x29, sp
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: msub x9, x8, x8, x9
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; CHECK-NEXT: mov sp, x9
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; CHECK-NEXT: sub x10, x29, #16
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; CHECK-NEXT: stur wzr, [x29, #-4]
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; CHECK-NEXT: sturh wzr, [x29, #-6]
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; CHECK-NEXT: stur x9, [x29, #-16]
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; CHECK-NEXT: sturh w8, [x29, #-8]
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; CHECK-NEXT: msr TPIDR2_EL0, x10
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; CHECK-NEXT: bl cosf
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; CHECK-NEXT: smstart za
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; CHECK-NEXT: mrs x8, TPIDR2_EL0
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; CHECK-NEXT: sub x0, x29, #16
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; CHECK-NEXT: cbnz x8, .LBB2_2
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; CHECK-NEXT: // %bb.1:
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; CHECK-NEXT: bl __arm_tpidr2_restore
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; CHECK-NEXT: .LBB2_2:
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; CHECK-NEXT: msr TPIDR2_EL0, xzr
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; CHECK-NEXT: mov sp, x29
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; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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%res = call float @llvm.cos.f32(float %a)
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ret float %res
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}
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; Test a combination of streaming-compatible -> normal call with lazy-save.
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define void @test_lazy_save_and_conditional_smstart() nounwind "aarch64_inout_za" "aarch64_pstate_sm_compatible" {
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; CHECK-LABEL: test_lazy_save_and_conditional_smstart:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp d15, d14, [sp, #-96]! // 16-byte Folded Spill
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; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: stp x29, x30, [sp, #64] // 16-byte Folded Spill
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; CHECK-NEXT: add x29, sp, #64
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; CHECK-NEXT: str x19, [sp, #80] // 8-byte Folded Spill
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: msub x9, x8, x8, x9
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; CHECK-NEXT: mov sp, x9
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; CHECK-NEXT: sub x10, x29, #80
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; CHECK-NEXT: stur wzr, [x29, #-68]
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; CHECK-NEXT: sturh wzr, [x29, #-70]
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; CHECK-NEXT: stur x9, [x29, #-80]
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; CHECK-NEXT: sturh w8, [x29, #-72]
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; CHECK-NEXT: msr TPIDR2_EL0, x10
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; CHECK-NEXT: bl __arm_sme_state
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; CHECK-NEXT: and x19, x0, #0x1
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; CHECK-NEXT: tbz w19, #0, .LBB3_2
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; CHECK-NEXT: // %bb.1:
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; CHECK-NEXT: smstop sm
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; CHECK-NEXT: .LBB3_2:
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; CHECK-NEXT: bl private_za_callee
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; CHECK-NEXT: tbz w19, #0, .LBB3_4
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; CHECK-NEXT: // %bb.3:
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; CHECK-NEXT: smstart sm
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; CHECK-NEXT: .LBB3_4:
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; CHECK-NEXT: smstart za
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; CHECK-NEXT: mrs x8, TPIDR2_EL0
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; CHECK-NEXT: sub x0, x29, #80
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; CHECK-NEXT: cbnz x8, .LBB3_6
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; CHECK-NEXT: // %bb.5:
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; CHECK-NEXT: bl __arm_tpidr2_restore
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; CHECK-NEXT: .LBB3_6:
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; CHECK-NEXT: msr TPIDR2_EL0, xzr
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; CHECK-NEXT: sub sp, x29, #64
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; CHECK-NEXT: ldp x29, x30, [sp, #64] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x19, [sp, #80] // 8-byte Folded Reload
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; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d15, d14, [sp], #96 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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call void @private_za_callee()
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ret void
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}
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