d3517b65b9
The test lldb-api::TestVariableAnnotationsDisassembler.py was failing on the lldb-remote-linux-ubuntu and lldb-remote-linux-win builders due to assembler incompatibilities in d_original_example.s. These failures are not related to the disassembler changes themselves but to the test setup. This patch updates the test to be skipped when running on unsupported architectures to avoid failures. The test will still run and validate correctly where the assembler input is supported.
116 lines
4.9 KiB
Python
116 lines
4.9 KiB
Python
from lldbsuite.test.lldbtest import *
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from lldbsuite.test.decorators import *
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import lldb
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import os
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import re
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class TestVariableAnnotationsDisassembler(TestBase):
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def _build_obj(self, obj_name: str) -> str:
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# Let the Makefile build all .o’s (pattern rule). Then grab the one we need.
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self.build()
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obj = self.getBuildArtifact(obj_name)
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self.assertTrue(os.path.exists(obj), f"missing object: {obj}")
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return obj
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def _create_target(self, path):
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target = self.dbg.CreateTarget(path)
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self.assertTrue(target, f"failed to create target for {path}")
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return target
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def _disassemble_verbose_symbol(self, symname):
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self.runCmd(f"disassemble -n {symname} -v", check=True)
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return self.res.GetOutput()
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@skipIf(archs=no_match(["x86_64"]))
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def test_d_original_example_O1(self):
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obj = self._build_obj("d_original_example.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("main")
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print(out)
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self.assertIn("argc = ", out)
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self.assertIn("argv = ", out)
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self.assertIn("i = ", out)
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self.assertNotIn("<decoding error>", out)
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@no_debug_info_test
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@skipIf(archs=no_match(["x86_64"]))
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def test_regs_int_params(self):
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obj = self._build_obj("regs_int_params.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("regs_int_params")
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print(out)
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self.assertRegex(out, r"\ba\s*=\s*(DW_OP_reg5\b|RDI\b)")
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self.assertRegex(out, r"\bb\s*=\s*(DW_OP_reg4\b|RSI\b)")
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self.assertRegex(out, r"\bc\s*=\s*(DW_OP_reg1\b|RDX\b)")
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self.assertRegex(out, r"\bd\s*=\s*(DW_OP_reg2\b|RCX\b)")
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self.assertRegex(out, r"\be\s*=\s*(DW_OP_reg8\b|R8\b)")
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self.assertRegex(out, r"\bf\s*=\s*(DW_OP_reg9\b|R9\b)")
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self.assertNotIn("<decoding error>", out)
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@no_debug_info_test
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@skipIf(archs=no_match(["x86_64"]))
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def test_regs_fp_params(self):
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obj = self._build_obj("regs_fp_params.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("regs_fp_params")
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print(out)
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self.assertRegex(out, r"\ba\s*=\s*(DW_OP_reg17\b|XMM0\b)")
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self.assertRegex(out, r"\bb\s*=\s*(DW_OP_reg18\b|XMM1\b)")
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self.assertRegex(out, r"\bc\s*=\s*(DW_OP_reg19\b|XMM2\b)")
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self.assertRegex(out, r"\bd\s*=\s*(DW_OP_reg20\b|XMM3\b)")
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self.assertRegex(out, r"\be\s*=\s*(DW_OP_reg21\b|XMM4\b)")
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self.assertRegex(out, r"\bf\s*=\s*(DW_OP_reg22\b|XMM5\b)")
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self.assertNotIn("<decoding error>", out)
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@no_debug_info_test
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@skipIf(archs=no_match(["x86_64"]))
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def test_regs_mixed_params(self):
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obj = self._build_obj("regs_mixed_params.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("regs_mixed_params")
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print(out)
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self.assertRegex(out, r"\ba\s*=\s*(DW_OP_reg5\b|RDI\b)")
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self.assertRegex(out, r"\bb\s*=\s*(DW_OP_reg4\b|RSI\b)")
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self.assertRegex(out, r"\bx\s*=\s*(DW_OP_reg17\b|XMM0\b|DW_OP_reg\d+\b)")
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self.assertRegex(out, r"\by\s*=\s*(DW_OP_reg18\b|XMM1\b|DW_OP_reg\d+\b)")
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self.assertRegex(out, r"\bc\s*=\s*(DW_OP_reg1\b|RDX\b)")
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self.assertRegex(out, r"\bz\s*=\s*(DW_OP_reg19\b|XMM2\b|DW_OP_reg\d+\b)")
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self.assertNotIn("<decoding error>", out)
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@no_debug_info_test
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@skipIf(archs=no_match(["x86_64"]))
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def test_live_across_call(self):
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obj = self._build_obj("live_across_call.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("live_across_call")
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print(out)
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self.assertRegex(out, r"\bx\s*=\s*(DW_OP_reg5\b|RDI\b)")
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self.assertIn("call", out)
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self.assertRegex(out, r"\br\s*=\s*(DW_OP_reg0\b|RAX\b|DW_OP_reg\d+\b)")
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self.assertNotIn("<decoding error>", out)
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@no_debug_info_test
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@skipIf(archs=no_match(["x86_64"]))
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def test_loop_reg_rotate(self):
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obj = self._build_obj("loop_reg_rotate.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("loop_reg_rotate")
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print(out)
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self.assertRegex(out, r"\bn\s*=\s*(DW_OP_reg\d+\b|R[A-Z0-9]+)")
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self.assertRegex(out, r"\bseed\s*=\s*(DW_OP_reg\d+\b|R[A-Z0-9]+)")
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self.assertRegex(out, r"\bk\s*=\s*(DW_OP_reg\d+\b|R[A-Z0-9]+)")
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self.assertRegex(out, r"\bj\s*=\s*(DW_OP_reg\d+\b|R[A-Z0-9]+)")
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self.assertRegex(out, r"\bi\s*=\s*(DW_OP_reg\d+\b|R[A-Z0-9]+)")
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self.assertNotIn("<decoding error>", out)
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@no_debug_info_test
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@skipIf(archs=no_match(["x86_64"]))
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def test_seed_reg_const_undef(self):
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obj = self._build_obj("seed_reg_const_undef.o")
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target = self._create_target(obj)
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out = self._disassemble_verbose_symbol("main")
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print(out)
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self.assertRegex(out, r"\b(i|argc)\s*=\s*(DW_OP_reg\d+\b|R[A-Z0-9]+)")
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self.assertNotIn("<decoding error>", out)
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