Jay Foad d075debc50

[AMDGPU] Fix chain handling when lowering barrier intrinsics (#109799) ...

Previously we would fail an assertion in RemoveNodeFromCSEMaps after
lowering:
t3: ch = llvm.amdgcn.s.barrier.join t0, TargetConstant:i64<2973>,
Constant:i32<0>
to:
  t6: ch = S_BARRIER_JOIN_IMM TargetConstant:i32<0>

2024-09-24 16:50:46 +01:00

..

AArch64

[SDAG] Avoid creating redundant stack slots when lowering FSINCOS (#108401)

2024-09-24 13:36:21 +01:00

AMDGPU

[AMDGPU] Fix chain handling when lowering barrier intrinsics (#109799)

2024-09-24 16:50:46 +01:00

ARC

…

ARM

[LLVM][ARM][CodeGen]Define branch instruction alignment for m85 and m7 (#109647)

2024-09-24 11:26:06 +01:00

AVR

[AVR] Fix parsing & emitting relative jumps (#106722)

2024-08-30 15:25:54 +02:00

BPF

[BPF] Make -mcpu=v3 as the default (#107008)

2024-09-03 07:15:18 -07:00

CSKY

…

DirectX

[DXIL] Consume Metadata Analysis information in passes (#108034)

2024-09-23 19:00:20 -04:00

Generic

Add target-byteorder for cases where endian in target triple is what matters (#107915)

2024-09-23 13:00:44 -04:00

Hexagon

[MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (#108546)

2024-09-24 14:21:45 +02:00

Inputs

…

Lanai

…

LoongArch

[DAGCombine] Count leading ones: refine post DAG/Type Legalisation if promotion (#102877)

2024-09-15 15:48:36 +04:00

M68k

[M68k] Introduce more MOVI cases (#98377)

2024-09-03 19:04:23 -04:00

Mips

[MIPS] Fix failing to legalize load+call with vector of non-p2 integer (#109625)

2024-09-24 09:38:38 +02:00

MIR

[MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (#108546)

2024-09-24 14:21:45 +02:00

MLRegAlloc

[mlgo] Fix test post - #106744

2024-09-05 07:37:09 -07:00

MSP430

…

NVPTX

[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast (#109710)

2024-09-24 08:15:14 -07:00

PowerPC

[Codegen][LegalizeIntegerTypes] Improve shift through stack (#96151)

2024-09-23 11:45:43 +02:00

RISCV

[Codegen][LegalizeIntegerTypes] Improve shift through stack (#96151)

2024-09-23 11:45:43 +02:00

SPARC

[ISelDAG] Salvage debug info at isel by referring to frame indices. (#109126)

2024-09-24 15:02:04 +02:00

SPIRV

[AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (#107013)

2024-09-24 13:33:31 +02:00

SystemZ

Target ABI: improve call parameters extensions handling (#100757)

2024-09-19 16:59:31 +02:00

Thumb

[CodeGen][NewPM] Port MachineCSE pass to new pass manager. (#106605)

2024-09-04 18:54:07 +05:30

Thumb2

[ARM] Fix VMOVRRD combine with non-canonical inserts. (#109639)

2024-09-24 08:10:50 +01:00

VE

Add usub_cond and usub_sat operations to atomicrmw (#105568)

2024-09-06 16:19:20 +01:00

WebAssembly

[clang][wasm] Replace the target integer sub saturate intrinsics with the equivalent generic __builtin_elementwise_sub_sat intrinsics (#109405)

2024-09-22 10:12:41 +01:00

WinCFGuard

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WinEH

[Windows SEH] Fix crash on empty seh block (#107031)

2024-09-04 22:10:36 +04:00

X86

[ISelDAG] Salvage debug info at isel by referring to frame indices. (#109126)

2024-09-24 15:02:04 +02:00

XCore

…

Xtensa

[Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (#107363)

2024-09-13 21:33:54 +03:00