d9a5aa8e2d
Change all the cstval_pred_ty based PatternMatch helpers (things like m_AllOnes and m_Zero) to only allow poison elements inside vector splats, not undef elements. Historically, we used to represent non-demanded elements in vectors using undef. Nowadays, we use poison instead. As such, I believe that support for undef in vector splats is no longer useful. At the same time, while poison splat elements are pretty much always safe to ignore, this is not generally the case for undef elements. We have existing miscompiles in our tests due to this (see the masked-merge-*.ll tests changed here) and it's easy to miss such cases in the future, now that we write tests using poison instead of undef elements. I think overall, keeping support for undef elements no longer makes sense, and we should drop it. Once this is done consistently, I think we may also consider allowing poison in m_APInt by default, as doing that change is much less risky than doing the same with undef. This change involves a substantial amount of test changes. For most tests, I've just replaced undef with poison, as I don't think there is value in retaining both. For some tests (where the distinction between undef and poison is important), I've duplicated tests.
667 lines
17 KiB
LLVM
667 lines
17 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
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define i32 @zero_dividend(i32 %A) {
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; CHECK-LABEL: @zero_dividend(
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; CHECK-NEXT: ret i32 0
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;
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%B = sdiv i32 0, %A
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ret i32 %B
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}
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define <2 x i32> @zero_dividend_vector(<2 x i32> %A) {
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; CHECK-LABEL: @zero_dividend_vector(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%B = udiv <2 x i32> zeroinitializer, %A
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ret <2 x i32> %B
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}
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define <2 x i32> @zero_dividend_vector_poison_elt(<2 x i32> %A) {
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; CHECK-LABEL: @zero_dividend_vector_poison_elt(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%B = sdiv <2 x i32> <i32 0, i32 poison>, %A
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ret <2 x i32> %B
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}
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; Division-by-zero is poison. UB in any vector lane means the whole op is poison.
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define <2 x i8> @sdiv_zero_elt_vec_constfold(<2 x i8> %x) {
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; CHECK-LABEL: @sdiv_zero_elt_vec_constfold(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%div = sdiv <2 x i8> <i8 1, i8 2>, <i8 0, i8 -42>
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ret <2 x i8> %div
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}
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define <2 x i8> @udiv_zero_elt_vec_constfold(<2 x i8> %x) {
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; CHECK-LABEL: @udiv_zero_elt_vec_constfold(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%div = udiv <2 x i8> <i8 1, i8 2>, <i8 42, i8 0>
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ret <2 x i8> %div
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}
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define <2 x i8> @sdiv_zero_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @sdiv_zero_elt_vec(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%div = sdiv <2 x i8> %x, <i8 -42, i8 0>
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ret <2 x i8> %div
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}
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define <2 x i8> @udiv_zero_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @udiv_zero_elt_vec(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%div = udiv <2 x i8> %x, <i8 0, i8 42>
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ret <2 x i8> %div
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}
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define <2 x i8> @sdiv_poison_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @sdiv_poison_elt_vec(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%div = sdiv <2 x i8> %x, <i8 -42, i8 poison>
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ret <2 x i8> %div
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}
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define <2 x i8> @udiv_poison_elt_vec(<2 x i8> %x) {
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; CHECK-LABEL: @udiv_poison_elt_vec(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%div = udiv <2 x i8> %x, <i8 poison, i8 42>
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ret <2 x i8> %div
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}
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; Division-by-zero is poison. UB in any vector lane means the whole op is poison.
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; Thus, we can simplify this: if any element of 'y' is 0, we can do anything.
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; Therefore, assume that all elements of 'y' must be 1.
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define <2 x i1> @sdiv_bool_vec(<2 x i1> %x, <2 x i1> %y) {
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; CHECK-LABEL: @sdiv_bool_vec(
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; CHECK-NEXT: ret <2 x i1> [[X:%.*]]
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;
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%div = sdiv <2 x i1> %x, %y
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ret <2 x i1> %div
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}
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define <2 x i1> @udiv_bool_vec(<2 x i1> %x, <2 x i1> %y) {
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; CHECK-LABEL: @udiv_bool_vec(
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; CHECK-NEXT: ret <2 x i1> [[X:%.*]]
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;
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%div = udiv <2 x i1> %x, %y
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ret <2 x i1> %div
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}
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define i32 @zext_bool_udiv_divisor(i1 %x, i32 %y) {
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; CHECK-LABEL: @zext_bool_udiv_divisor(
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; CHECK-NEXT: ret i32 [[Y:%.*]]
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;
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%ext = zext i1 %x to i32
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%r = udiv i32 %y, %ext
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ret i32 %r
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}
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define <2 x i32> @zext_bool_sdiv_divisor_vec(<2 x i1> %x, <2 x i32> %y) {
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; CHECK-LABEL: @zext_bool_sdiv_divisor_vec(
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; CHECK-NEXT: ret <2 x i32> [[Y:%.*]]
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;
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%ext = zext <2 x i1> %x to <2 x i32>
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%r = sdiv <2 x i32> %y, %ext
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ret <2 x i32> %r
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}
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define i32 @udiv_dividend_known_smaller_than_constant_divisor(i32 %x) {
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; CHECK-LABEL: @udiv_dividend_known_smaller_than_constant_divisor(
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; CHECK-NEXT: ret i32 0
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;
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%and = and i32 %x, 250
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%div = udiv i32 %and, 251
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ret i32 %div
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}
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define i32 @not_udiv_dividend_known_smaller_than_constant_divisor(i32 %x) {
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; CHECK-LABEL: @not_udiv_dividend_known_smaller_than_constant_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 251
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[AND]], 251
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%and = and i32 %x, 251
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%div = udiv i32 %and, 251
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ret i32 %div
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}
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define i32 @udiv_constant_dividend_known_smaller_than_divisor(i32 %x) {
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; CHECK-LABEL: @udiv_constant_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: ret i32 0
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;
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%or = or i32 %x, 251
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%div = udiv i32 250, %or
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ret i32 %div
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}
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define i32 @not_udiv_constant_dividend_known_smaller_than_divisor(i32 %x) {
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; CHECK-LABEL: @not_udiv_constant_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 251
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 251, [[OR]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%or = or i32 %x, 251
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%div = udiv i32 251, %or
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ret i32 %div
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}
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define i8 @udiv_dividend_known_smaller_than_constant_divisor2(i1 %b) {
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; CHECK-LABEL: @udiv_dividend_known_smaller_than_constant_divisor2(
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; CHECK-NEXT: ret i8 0
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;
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%t0 = zext i1 %b to i8
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%xor = xor i8 %t0, 12
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%r = udiv i8 %xor, 14
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ret i8 %r
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}
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; negative test - dividend can equal 13
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define i8 @not_udiv_dividend_known_smaller_than_constant_divisor2(i1 %b) {
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; CHECK-LABEL: @not_udiv_dividend_known_smaller_than_constant_divisor2(
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; CHECK-NEXT: [[T0:%.*]] = zext i1 [[B:%.*]] to i8
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; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[T0]], 12
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; CHECK-NEXT: [[R:%.*]] = udiv i8 [[XOR]], 13
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; CHECK-NEXT: ret i8 [[R]]
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;
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%t0 = zext i1 %b to i8
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%xor = xor i8 %t0, 12
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%r = udiv i8 %xor, 13
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ret i8 %r
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}
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; This would require computing known bits on both x and y. Is it worth doing?
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define i32 @udiv_dividend_known_smaller_than_divisor(i32 %x, i32 %y) {
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; CHECK-LABEL: @udiv_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 250
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 251
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[AND]], [[OR]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%and = and i32 %x, 250
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%or = or i32 %y, 251
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%div = udiv i32 %and, %or
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ret i32 %div
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}
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define i32 @not_udiv_dividend_known_smaller_than_divisor(i32 %x, i32 %y) {
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; CHECK-LABEL: @not_udiv_dividend_known_smaller_than_divisor(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 251
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 251
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[AND]], [[OR]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%and = and i32 %x, 251
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%or = or i32 %y, 251
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%div = udiv i32 %and, %or
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ret i32 %div
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}
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declare i32 @external()
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define i32 @div1() {
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; CHECK-LABEL: @div1(
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; CHECK-NEXT: [[CALL:%.*]] = call i32 @external(), !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: ret i32 0
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;
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%call = call i32 @external(), !range !0
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%urem = udiv i32 %call, 3
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ret i32 %urem
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}
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define i8 @sdiv_minusone_divisor() {
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; CHECK-LABEL: @sdiv_minusone_divisor(
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; CHECK-NEXT: ret i8 poison
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;
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%v = sdiv i8 -128, -1
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ret i8 %v
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}
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@g = external global i64
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@g2 = external global i64
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define i64 @const_sdiv_one() {
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; CHECK-LABEL: @const_sdiv_one(
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; CHECK-NEXT: ret i64 ptrtoint (ptr @g to i64)
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;
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%div = sdiv i64 ptrtoint (ptr @g to i64), 1
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ret i64 %div
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}
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define i64 @const_srem_one() {
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; CHECK-LABEL: @const_srem_one(
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; CHECK-NEXT: ret i64 0
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;
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%rem = srem i64 ptrtoint (ptr @g to i64), 1
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ret i64 %rem
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}
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define i64 @const_udiv_one() {
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; CHECK-LABEL: @const_udiv_one(
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; CHECK-NEXT: ret i64 ptrtoint (ptr @g to i64)
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;
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%div = udiv i64 ptrtoint (ptr @g to i64), 1
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ret i64 %div
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}
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define i64 @const_urem_one() {
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; CHECK-LABEL: @const_urem_one(
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; CHECK-NEXT: ret i64 0
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;
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%rem = urem i64 ptrtoint (ptr @g to i64), 1
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ret i64 %rem
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}
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define i64 @const_sdiv_zero() {
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; CHECK-LABEL: @const_sdiv_zero(
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; CHECK-NEXT: ret i64 0
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;
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%div = sdiv i64 0, ptrtoint (ptr @g to i64)
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ret i64 %div
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}
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define i64 @const_srem_zero() {
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; CHECK-LABEL: @const_srem_zero(
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; CHECK-NEXT: ret i64 0
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;
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%rem = srem i64 0, ptrtoint (ptr @g to i64)
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ret i64 %rem
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}
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define i64 @const_udiv_zero() {
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; CHECK-LABEL: @const_udiv_zero(
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; CHECK-NEXT: ret i64 0
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;
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%div = udiv i64 0, ptrtoint (ptr @g to i64)
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ret i64 %div
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}
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define i64 @const_urem_zero() {
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; CHECK-LABEL: @const_urem_zero(
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; CHECK-NEXT: ret i64 0
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;
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%rem = urem i64 0, ptrtoint (ptr @g to i64)
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ret i64 %rem
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}
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define i64 @const_sdiv_zero_negone() {
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; CHECK-LABEL: @const_sdiv_zero_negone(
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; CHECK-NEXT: ret i64 0
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;
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%div = sdiv i64 0, -1
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ret i64 %div
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}
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define i1 @const_sdiv_i1() {
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; CHECK-LABEL: @const_sdiv_i1(
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; CHECK-NEXT: ret i1 ptrtoint (ptr @g to i1)
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;
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%div = sdiv i1 ptrtoint (ptr @g to i1), ptrtoint (ptr @g2 to i1)
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ret i1 %div
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}
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define i1 @const_srem_1() {
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; CHECK-LABEL: @const_srem_1(
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; CHECK-NEXT: ret i1 false
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;
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%rem = srem i1 ptrtoint (ptr @g to i1), ptrtoint (ptr @g2 to i1)
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ret i1 %rem
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}
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define i1 @const_udiv_i1() {
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; CHECK-LABEL: @const_udiv_i1(
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; CHECK-NEXT: ret i1 ptrtoint (ptr @g to i1)
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;
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%div = udiv i1 ptrtoint (ptr @g to i1), ptrtoint (ptr @g2 to i1)
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ret i1 %div
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}
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define i1 @const_urem_1() {
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; CHECK-LABEL: @const_urem_1(
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; CHECK-NEXT: ret i1 false
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;
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%rem = urem i1 ptrtoint (ptr @g to i1), ptrtoint (ptr @g2 to i1)
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ret i1 %rem
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}
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; Can't divide evenly, so create poison.
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define i8 @sdiv_exact_trailing_zeros(i8 %x) {
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; CHECK-LABEL: @sdiv_exact_trailing_zeros(
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; CHECK-NEXT: ret i8 poison
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;
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%o = or i8 %x, 1 ; odd number
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%r = sdiv exact i8 %o, -42 ; can't divide exactly
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ret i8 %r
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}
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; Negative test - could divide evenly.
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define i8 @sdiv_exact_trailing_zeros_eq(i8 %x) {
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; CHECK-LABEL: @sdiv_exact_trailing_zeros_eq(
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; CHECK-NEXT: [[O:%.*]] = or i8 [[X:%.*]], 2
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; CHECK-NEXT: [[R:%.*]] = sdiv exact i8 [[O]], -42
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; CHECK-NEXT: ret i8 [[R]]
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;
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%o = or i8 %x, 2
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%r = sdiv exact i8 %o, -42
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ret i8 %r
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}
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; Negative test - must be exact div.
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define i8 @sdiv_trailing_zeros(i8 %x) {
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; CHECK-LABEL: @sdiv_trailing_zeros(
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; CHECK-NEXT: [[O:%.*]] = or i8 [[X:%.*]], 1
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; CHECK-NEXT: [[R:%.*]] = sdiv i8 [[O]], -12
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; CHECK-NEXT: ret i8 [[R]]
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;
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%o = or i8 %x, 1
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%r = sdiv i8 %o, -12
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ret i8 %r
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}
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; TODO: Match non-splat vector constants.
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define <2 x i8> @sdiv_exact_trailing_zeros_nonuniform_vector(<2 x i8> %x) {
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; CHECK-LABEL: @sdiv_exact_trailing_zeros_nonuniform_vector(
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; CHECK-NEXT: [[O:%.*]] = or <2 x i8> [[X:%.*]], <i8 3, i8 1>
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; CHECK-NEXT: [[R:%.*]] = sdiv exact <2 x i8> [[O]], <i8 12, i8 2>
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; CHECK-NEXT: ret <2 x i8> [[R]]
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;
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%o = or <2 x i8> %x, <i8 3, i8 1>
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%r = sdiv exact <2 x i8> %o, <i8 12, i8 2>
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ret <2 x i8> %r
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}
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; Can't divide evenly, so create poison.
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define <2 x i8> @udiv_exact_trailing_zeros(<2 x i8> %x) {
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; CHECK-LABEL: @udiv_exact_trailing_zeros(
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; CHECK-NEXT: ret <2 x i8> poison
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;
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%o = or <2 x i8> %x, <i8 3, i8 3>
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%r = udiv exact <2 x i8> %o, <i8 12, i8 12> ; can't divide exactly
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ret <2 x i8> %r
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}
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; Negative test - could divide evenly.
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define <2 x i8> @udiv_exact_trailing_zeros_eq(<2 x i8> %x) {
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; CHECK-LABEL: @udiv_exact_trailing_zeros_eq(
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; CHECK-NEXT: [[O:%.*]] = or <2 x i8> [[X:%.*]], <i8 28, i8 28>
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; CHECK-NEXT: [[R:%.*]] = udiv exact <2 x i8> [[O]], <i8 12, i8 12>
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; CHECK-NEXT: ret <2 x i8> [[R]]
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;
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%o = or <2 x i8> %x, <i8 28, i8 28>
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%r = udiv exact <2 x i8> %o, <i8 12, i8 12>
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ret <2 x i8> %r
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}
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; Negative test - must be exact div.
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define i8 @udiv_trailing_zeros(i8 %x) {
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; CHECK-LABEL: @udiv_trailing_zeros(
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; CHECK-NEXT: [[O:%.*]] = or i8 [[X:%.*]], 1
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; CHECK-NEXT: [[R:%.*]] = udiv i8 [[O]], 12
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; CHECK-NEXT: ret i8 [[R]]
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;
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%o = or i8 %x, 1
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%r = udiv i8 %o, 12
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ret i8 %r
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}
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; Negative test - only the first element is poison
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define <2 x i8> @udiv_exact_trailing_zeros_nonuniform_vector(<2 x i8> %x) {
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; CHECK-LABEL: @udiv_exact_trailing_zeros_nonuniform_vector(
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|
; CHECK-NEXT: [[O:%.*]] = or <2 x i8> [[X:%.*]], <i8 3, i8 3>
|
|
; CHECK-NEXT: [[R:%.*]] = udiv exact <2 x i8> [[O]], <i8 12, i8 1>
|
|
; CHECK-NEXT: ret <2 x i8> [[R]]
|
|
;
|
|
%o = or <2 x i8> %x, <i8 3, i8 3>
|
|
%r = udiv exact <2 x i8> %o, <i8 12, i8 1>
|
|
ret <2 x i8> %r
|
|
}
|
|
|
|
!0 = !{i32 0, i32 3}
|
|
|
|
define i32 @sdiv_one_srem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @sdiv_one_srem_divisor(
|
|
; CHECK-NEXT: ret i32 [[A:%.*]]
|
|
;
|
|
%srem = srem i32 1, %b
|
|
%sdiv = sdiv i32 %a, %srem
|
|
ret i32 %sdiv
|
|
}
|
|
|
|
define i32 @sdiv_one_urem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @sdiv_one_urem_divisor(
|
|
; CHECK-NEXT: ret i32 [[A:%.*]]
|
|
;
|
|
%urem = urem i32 1, %b
|
|
%sdiv = sdiv i32 %a, %urem
|
|
ret i32 %sdiv
|
|
}
|
|
|
|
define i32 @udiv_one_srem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @udiv_one_srem_divisor(
|
|
; CHECK-NEXT: ret i32 [[A:%.*]]
|
|
;
|
|
%srem = srem i32 1, %b
|
|
%udiv = udiv i32 %a, %srem
|
|
ret i32 %udiv
|
|
}
|
|
|
|
define i32 @udiv_one_urem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @udiv_one_urem_divisor(
|
|
; CHECK-NEXT: ret i32 [[A:%.*]]
|
|
;
|
|
%urem = urem i32 1, %b
|
|
%udiv = udiv i32 %a, %urem
|
|
ret i32 %udiv
|
|
}
|
|
|
|
define i32 @srem_one_srem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @srem_one_srem_divisor(
|
|
; CHECK-NEXT: ret i32 0
|
|
;
|
|
%srem = srem i32 1, %b
|
|
%srem1 = srem i32 %a, %srem
|
|
ret i32 %srem1
|
|
}
|
|
|
|
define i32 @urem_one_srem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @urem_one_srem_divisor(
|
|
; CHECK-NEXT: ret i32 0
|
|
;
|
|
%srem = srem i32 1, %b
|
|
%urem = urem i32 %a, %srem
|
|
ret i32 %urem
|
|
}
|
|
|
|
define i32 @srem_one_urem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @srem_one_urem_divisor(
|
|
; CHECK-NEXT: ret i32 0
|
|
;
|
|
%urem = urem i32 1, %b
|
|
%srem = srem i32 %a, %urem
|
|
ret i32 %srem
|
|
}
|
|
|
|
define i32 @urem_one_urem_divisor(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @urem_one_urem_divisor(
|
|
; CHECK-NEXT: ret i32 0
|
|
;
|
|
%urem = urem i32 1, %b
|
|
%urem1 = urem i32 %a, %urem
|
|
ret i32 %urem1
|
|
}
|
|
|
|
define <2 x i8> @sdiv_one_vec_srem_divisor(<2 x i8> %a, <2 x i8> %b) {
|
|
; CHECK-LABEL: @sdiv_one_vec_srem_divisor(
|
|
; CHECK-NEXT: ret <2 x i8> [[A:%.*]]
|
|
;
|
|
%srem = srem <2 x i8> <i8 1, i8 1>, %b
|
|
%sdiv = sdiv <2 x i8> %a, %srem
|
|
ret <2 x i8> %sdiv
|
|
}
|
|
|
|
define i32 @sdiv_and_one_divisor(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @sdiv_and_one_divisor(
|
|
; CHECK-NEXT: ret i32 [[Y:%.*]]
|
|
;
|
|
%and = and i32 %x, 1
|
|
%res = sdiv i32 %y, %and
|
|
ret i32 %res
|
|
}
|
|
|
|
define <2 x i8> @sdiv_and_one_vec_divisor(<2 x i8> %x, <2 x i8> %y) {
|
|
; CHECK-LABEL: @sdiv_and_one_vec_divisor(
|
|
; CHECK-NEXT: ret <2 x i8> [[Y:%.*]]
|
|
;
|
|
%and = and <2 x i8> %x, <i8 1, i8 1>
|
|
%res = sdiv <2 x i8> %y, %and
|
|
ret <2 x i8> %res
|
|
}
|
|
|
|
define i32 @sdiv_neg_or_divisor(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @sdiv_neg_or_divisor(
|
|
; CHECK-NEXT: ret i32 [[Y:%.*]]
|
|
;
|
|
%or = or i32 %x, -2
|
|
%neg = xor i32 %or, -1
|
|
%res = sdiv i32 %y, %neg
|
|
ret i32 %res
|
|
}
|
|
|
|
define i32 @sdiv_neg_or_multi_one_bit_divisor(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: @sdiv_neg_or_multi_one_bit_divisor(
|
|
; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -3
|
|
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[OR]], -1
|
|
; CHECK-NEXT: [[RES:%.*]] = sdiv i32 [[Y:%.*]], [[NEG]]
|
|
; CHECK-NEXT: ret i32 [[RES]]
|
|
;
|
|
%or = or i32 %x, -3
|
|
%neg = xor i32 %or, -1
|
|
%res = sdiv i32 %y, %neg
|
|
ret i32 %res
|
|
}
|
|
|
|
define <2 x i8> @sdiv_vec_multi_one_bit_divisor(<2 x i8> %x, <2 x i8> %y) {
|
|
; CHECK-LABEL: @sdiv_vec_multi_one_bit_divisor(
|
|
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 1, i8 3>
|
|
; CHECK-NEXT: [[RES:%.*]] = sdiv <2 x i8> [[Y:%.*]], [[AND]]
|
|
; CHECK-NEXT: ret <2 x i8> [[RES]]
|
|
;
|
|
%and = and <2 x i8> %x, <i8 1, i8 3>
|
|
%res = sdiv <2 x i8> %y, %and
|
|
ret <2 x i8> %res
|
|
}
|
|
|
|
define i8 @udiv_exact_mul_nsw(i8 %x) {
|
|
; CHECK-LABEL: @udiv_exact_mul_nsw(
|
|
; CHECK-NEXT: ret i8 [[X:%.*]]
|
|
;
|
|
%a = mul nsw i8 %x, 24
|
|
%b = udiv exact i8 %a, 24
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @sdiv_exact_mul_nuw(i8 %x) {
|
|
; CHECK-LABEL: @sdiv_exact_mul_nuw(
|
|
; CHECK-NEXT: ret i8 [[X:%.*]]
|
|
;
|
|
%a = mul nuw i8 %x, 24
|
|
%b = sdiv exact i8 %a, 24
|
|
ret i8 %b
|
|
}
|
|
|
|
; Negative tests
|
|
|
|
define i8 @udiv_exact_mul_nsw_mismatch(i8 %x) {
|
|
; CHECK-LABEL: @udiv_exact_mul_nsw_mismatch(
|
|
; CHECK-NEXT: [[A:%.*]] = mul nsw i8 [[X:%.*]], 24
|
|
; CHECK-NEXT: [[B:%.*]] = udiv exact i8 [[A]], 12
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul nsw i8 %x, 24
|
|
%b = udiv exact i8 %a, 12
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @udiv_exact_mul_nsw_power_of_2(i8 %x) {
|
|
; CHECK-LABEL: @udiv_exact_mul_nsw_power_of_2(
|
|
; CHECK-NEXT: [[A:%.*]] = mul nsw i8 [[X:%.*]], 8
|
|
; CHECK-NEXT: [[B:%.*]] = udiv exact i8 [[A]], 8
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul nsw i8 %x, 8
|
|
%b = udiv exact i8 %a, 8
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @sdiv_exact_mul_nuw_power_of_2(i8 %x) {
|
|
; CHECK-LABEL: @sdiv_exact_mul_nuw_power_of_2(
|
|
; CHECK-NEXT: [[A:%.*]] = mul nuw i8 [[X:%.*]], 8
|
|
; CHECK-NEXT: [[B:%.*]] = sdiv exact i8 [[A]], 8
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul nuw i8 %x, 8
|
|
%b = sdiv exact i8 %a, 8
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @udiv_exact_mul(i8 %x) {
|
|
; CHECK-LABEL: @udiv_exact_mul(
|
|
; CHECK-NEXT: [[A:%.*]] = mul i8 [[X:%.*]], 24
|
|
; CHECK-NEXT: [[B:%.*]] = udiv exact i8 [[A]], 24
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul i8 %x, 24
|
|
%b = udiv exact i8 %a, 24
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @sdiv_exact_mul(i8 %x) {
|
|
; CHECK-LABEL: @sdiv_exact_mul(
|
|
; CHECK-NEXT: [[A:%.*]] = mul i8 [[X:%.*]], 24
|
|
; CHECK-NEXT: [[B:%.*]] = sdiv exact i8 [[A]], 24
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul i8 %x, 24
|
|
%b = sdiv exact i8 %a, 24
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @udiv_mul_nsw(i8 %x) {
|
|
; CHECK-LABEL: @udiv_mul_nsw(
|
|
; CHECK-NEXT: [[A:%.*]] = mul nsw i8 [[X:%.*]], 24
|
|
; CHECK-NEXT: [[B:%.*]] = udiv i8 [[A]], 24
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul nsw i8 %x, 24
|
|
%b = udiv i8 %a, 24
|
|
ret i8 %b
|
|
}
|
|
|
|
define i8 @sdiv_mul_nuw(i8 %x) {
|
|
; CHECK-LABEL: @sdiv_mul_nuw(
|
|
; CHECK-NEXT: [[A:%.*]] = mul nuw i8 [[X:%.*]], 24
|
|
; CHECK-NEXT: [[B:%.*]] = sdiv i8 [[A]], 24
|
|
; CHECK-NEXT: ret i8 [[B]]
|
|
;
|
|
%a = mul nuw i8 %x, 24
|
|
%b = sdiv i8 %a, 24
|
|
ret i8 %b
|
|
}
|