8d16c6809a
After some discussion and experimentation, we have seen that changing the default number of vector register bits to LMUL=2 strikes a sweet spot. Whilst we could be clever here and make the vectorizer smarter about dynamically selecting an LMUL that a) Doesn't affect register pressure b) Suitable for the microarchitecture we would need to teach its heuristics about RISC-V register grouping specifics. Instead this just does the easy, pragmatic thing by changing the default to a safe value that doesn't affect register pressure signifcantly[1], but should increase throughput and unlock more interleaving. [1] Register spilling when compiling sqlite at various levels of `-riscv-v-register-bit-width-lmul`: LMUL=1 2573 spills LMUL=2 2583 spills LMUL=4 2819 spills LMUL=8 3256 spills Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D143723
52 lines
2.1 KiB
LLVM
52 lines
2.1 KiB
LLVM
; REQUIRES: asserts
|
|
; RUN: opt -passes=loop-vectorize,dce,instcombine -mtriple riscv64-linux-gnu \
|
|
; RUN: -mattr=+v -debug-only=loop-vectorize \
|
|
; RUN: -riscv-v-vector-bits-min=128 -scalable-vectorization=off -S < %s 2>&1 | FileCheck %s
|
|
|
|
; CHECK-LABEL: foo
|
|
; CHECK: LV: IC is 2
|
|
; CHECK: %{{.*}} = add <8 x i32> %{{.*}}, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
|
|
; CHECK: %{{.*}} = add {{.*}}, 16
|
|
|
|
; Function Attrs: nofree norecurse nosync nounwind writeonly
|
|
define dso_local void @foo(i32 signext %n, ptr nocapture %A) local_unnamed_addr #0 {
|
|
entry:
|
|
%cmp5 = icmp sgt i32 %n, 0
|
|
br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
|
|
|
|
for.body.preheader: ; preds = %entry
|
|
%wide.trip.count = zext i32 %n to i64
|
|
br label %for.body
|
|
|
|
for.cond.cleanup.loopexit: ; preds = %for.body
|
|
br label %for.cond.cleanup
|
|
|
|
for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
|
|
ret void
|
|
|
|
for.body: ; preds = %for.body.preheader, %for.body
|
|
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
|
|
%arrayidx = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
|
|
%0 = trunc i64 %indvars.iv to i32
|
|
store i32 %0, ptr %arrayidx, align 4, !tbaa !4
|
|
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
|
%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
|
|
br i1 %exitcond.not, label %for.cond.cleanup.loopexit, label %for.body, !llvm.loop !8
|
|
}
|
|
|
|
attributes #0 = { nofree norecurse nosync nounwind writeonly "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+a,+c,+m,+relax,-save-restore" }
|
|
|
|
!llvm.module.flags = !{!0, !1, !2}
|
|
!llvm.ident = !{!3}
|
|
|
|
!0 = !{i32 1, !"wchar_size", i32 4}
|
|
!1 = !{i32 1, !"target-abi", !"lp64"}
|
|
!2 = !{i32 8, !"SmallDataLimit", i32 8}
|
|
!3 = !{!"clang version 13.0.0"}
|
|
!4 = !{!5, !5, i64 0}
|
|
!5 = !{!"int", !6, i64 0}
|
|
!6 = !{!"omnipotent char", !7, i64 0}
|
|
!7 = !{!"Simple C/C++ TBAA"}
|
|
!8 = distinct !{!8, !9}
|
|
!9 = !{!"llvm.loop.mustprogress"}
|