29b8b72117
This patch moves the check if any vector instructions will be generated from getInstructionCost to be based on VPlan. This simplifies getInstructionCost, is more accurate as we check the final result and also allows us to exit early once we visit a recipe that generates vector instructions. The helper can then be re-used by the VPlan-based cost model to match the legacy selectVectorizationFactor behavior, this fixing a crash and paving the way to recommit https://github.com/llvm/llvm-project/pull/92555. PR: https://github.com/llvm/llvm-project/pull/96622
31 lines
1.2 KiB
LLVM
31 lines
1.2 KiB
LLVM
; RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -S | FileCheck %s
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; Out of the LCSSA form we could have 'phi i32 [ loop-invariant, %for.inc.2.i ]'
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; but the IR Verifier requires for PHI one entry for each predecessor of
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; it's parent basic block. The original PR14725 solution for the issue just
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; added 'undef' for an predecessor BB and which is not correct. We copy the real
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; value for another predecessor instead of bringing 'undef'.
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; CHECK-LABEL: for.cond.preheader:
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; CHECK: %e.0.ph = phi i32 [ 0, %if.end.2.i ], [ 0, %middle.block ]
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; Function Attrs: nounwind uwtable
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define void @main() #0 {
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entry:
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br label %for.cond1.preheader.i
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for.cond1.preheader.i: ; preds = %if.end.2.i, %entry
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%c.06.i = phi i32 [ 0, %entry ], [ %inc5.i, %if.end.2.i ]
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%tobool.i = icmp ne i32 undef, 0
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br label %if.end.2.i
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if.end.2.i: ; preds = %for.cond1.preheader.i
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%inc5.i = add nsw i32 %c.06.i, 1
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%cmp.i = icmp slt i32 %inc5.i, 16
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br i1 %cmp.i, label %for.cond1.preheader.i, label %for.cond.preheader
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for.cond.preheader: ; preds = %if.end.2.i
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%e.0.ph = phi i32 [ 0, %if.end.2.i ]
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unreachable
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}
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