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llvm-project/llvm/lib/Target/AArch64
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Craig Topper 2ea9db0c49 [AArch64] Fix -Wparentheses warning with gcc 5.4. NFC
2021-07-26 21:08:56 -07:00
..
AsmParser
[AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc()
2021-07-26 09:36:34 +00:00
Disassembler
[AArch64][SME] Add mova instructions
2021-07-21 08:20:01 +00:00
GISel
Revert "[AArch64][GlobalISel] Legalize ctpop s128"
2021-07-26 17:06:43 -07:00
MCTargetDesc
[AArch64][SME] Add system registers and related instructions
2021-07-20 08:06:26 +00:00
TargetInfo
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
Utils
[AArch64][SME] Add system registers and related instructions
2021-07-20 08:06:26 +00:00
AArch64.h
[AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
2021-05-07 17:01:27 -07:00
AArch64.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
[AArch64] De-capitalize some Emit* functions
2021-07-11 22:05:39 -07:00
AArch64BranchTargets.cpp
[AArch64] Fix for BTI landing pad insertion with PAC-RET+bkey.
2021-04-23 10:07:25 +02:00
AArch64CallingConvention.cpp
[clang][AArch64] Correctly align HFA arguments when passed on the stack
2021-04-15 22:58:14 +01:00
AArch64CallingConvention.h
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AArch64CallingConvention.td
IR/AArch64/X86: add "swifttailcc" calling convention.
2021-05-17 10:48:34 +01:00
AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
[AArch64] Fix emitting an AdrpAddLdr LOH when there's a potential clobber of the
2021-03-01 13:52:57 -08:00
AArch64Combine.td
[AArch64][GlobalISel] Add identity combines to post-legal combiner.
2021-07-26 15:17:11 -07:00
AArch64CompressJumpTables.cpp
[AArch64] Don't try to compress jump tables if there are any inline asm instructions.
2020-12-10 12:20:02 -08:00
AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
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AArch64ConditionOptimizer.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
[AArch64] Fix some coding standard issues related to namespace llvm
2021-05-05 15:27:16 -07:00
AArch64ExpandImm.h
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AArch64ExpandPseudoInsts.cpp
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64FalkorHWPFFix.cpp
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AArch64FastISel.cpp
[AArch64] Optimize overflow checks for [s|u]mul.with.overflow.i32.
2021-07-12 15:30:42 -07:00
AArch64FrameLowering.cpp
[AArch64] Fix Local Deallocation for Homogeneous Prolog/Epilog
2021-07-25 10:51:11 -07:00
AArch64FrameLowering.h
[NFC] Fix a few whitespace issues and typos.
2021-07-04 11:49:58 +01:00
AArch64GenRegisterBankInfo.def
AArch64: support i128 cmpxchg in GlobalISel.
2021-05-14 10:41:38 +01:00
AArch64InstrAtomics.td
[AArch64] Fix i128 cmpxchg using ldxp/stxp.
2021-07-20 12:38:12 -07:00
AArch64InstrFormats.td
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64InstrGISel.td
AArch64: support i128 cmpxchg in GlobalISel.
2021-05-14 10:41:38 +01:00
AArch64InstrInfo.cpp
[AArch64] Dump a little more info about unimplemented reg-to-reg copies. NFC
2021-07-12 15:37:11 -07:00
AArch64InstrInfo.h
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64InstrInfo.td
[AArch64][SME] Add matrix register definitions and parsing support
2021-07-14 08:25:49 +00:00
AArch64ISelDAGToDAG.cpp
[SVE] Use reg+reg addressing mode for immediate offsets.
2021-07-26 16:24:16 +01:00
AArch64ISelLowering.cpp
[AArch64] Fix -Wparentheses warning with gcc 5.4. NFC
2021-07-26 21:08:56 -07:00
AArch64ISelLowering.h
[AArch64][SVE] Improve code generation for vector_splice for Imm == -1
2021-07-26 11:25:01 +01:00
AArch64LoadStoreOptimizer.cpp
Revert "[AArch64LoadStoreOptimizer] Recommit: Generate more STPs by renaming registers earlier"
2021-06-23 09:54:16 +03:00
AArch64LowerHomogeneousPrologEpilog.cpp
[CodeGen] Add missing includes (NFC)
2021-06-06 15:48:27 +02:00
AArch64MachineFunctionInfo.cpp
[llvm] Rename StringRef _lower() method calls to _insensitive()
2021-06-25 00:22:01 +03:00
AArch64MachineFunctionInfo.h
IR/AArch64/X86: add "swifttailcc" calling convention.
2021-05-17 10:48:34 +01:00
AArch64MacroFusion.cpp
[AArch64] Fix some coding standard issues related to namespace llvm
2021-05-05 15:27:16 -07:00
AArch64MacroFusion.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AArch64MCInstLower.cpp
[AArch64][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local
2021-05-07 09:44:26 -07:00
AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
[NFCI] Move DEBUG_TYPE definition below #includes
2021-05-30 17:31:01 +08:00
AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PfmCounters.td
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
[AArch64] Fix Copy Elemination for negative values
2020-12-18 13:30:46 +00:00
AArch64RegisterBanks.td
AArch64: support i128 cmpxchg in GlobalISel.
2021-05-14 10:41:38 +01:00
AArch64RegisterInfo.cpp
[AArch64][SME] Add load and store instructions
2021-07-16 10:11:10 +00:00
AArch64RegisterInfo.h
Change materializeFrameBaseRegister() to return register
2021-01-22 15:51:06 -08:00
AArch64RegisterInfo.td
[AArch64][SME] Improve diagnostic for vector select register
2021-07-22 13:46:40 +00:00
AArch64SchedA53.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedA55.td
[AArch64] Update Cortex-A55 SchedModel to improve LDP scheduling
2021-07-16 12:00:57 +01:00
AArch64SchedA57.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedA57WriteRes.td
[AARCH64] Improve accumulator forwarding for Cortex-A57 model
2021-01-04 10:58:43 +00:00
AArch64SchedA64FX.td
[AArch64] Add Fujitsu A64FX scheduling model
2021-01-15 17:14:04 +09:00
AArch64SchedCyclone.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedExynosM3.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedExynosM4.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedExynosM5.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedFalkor.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedKryoDetails.td
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AArch64SchedPredExynos.td
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AArch64SchedPredicates.td
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AArch64SchedThunderX2T99.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedThunderX3T110.td
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AArch64SchedThunderX.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedTSV110.td
[AArch64] Add pipeline model for HiSilicon's TSV110
2020-11-07 01:23:00 +03:00
AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp
[AArch64][SVE] Add patterns to generate FMLA/FMLS/FNMLA/FNMLS/FMAD
2021-02-18 16:55:16 +00:00
AArch64SelectionDAGInfo.h
[AArch64][SVE] Add patterns to generate FMLA/FMLS/FNMLA/FNMLS/FMAD
2021-02-18 16:55:16 +00:00
AArch64SIMDInstrOpt.cpp
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AArch64SLSHardening.cpp
[ARM][AArch64] SLSHardening: make non-comdat thunks possible
2021-05-20 17:07:05 +02:00
AArch64SMEInstrInfo.td
[AArch64][SME] Add mova instructions
2021-07-21 08:20:01 +00:00
AArch64SpeculationHardening.cpp
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AArch64StackTagging.cpp
[NFC][asan] Always pass Dominator Trees into forAllReachableExits
2021-07-22 18:01:38 -07:00
AArch64StackTaggingPreRA.cpp
[AArch64] Fix some coding standard issues related to namespace llvm
2021-05-05 15:27:16 -07:00
AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
[AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries
2021-06-21 13:00:36 +01:00
AArch64Subtarget.h
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64SystemOperands.td
[AArch64][SME] Add system registers and related instructions
2021-07-20 08:06:26 +00:00
AArch64TargetMachine.cpp
Fix typo in help text for -aarch64-enable-branch-targets.
2021-07-05 16:15:40 +01:00
AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
[Analysis] Add simple cost model for strict (in-order) reductions
2021-07-26 10:26:06 +01:00
AArch64TargetTransformInfo.h
[Analysis] Add simple cost model for strict (in-order) reductions
2021-07-26 10:26:06 +01:00
CMakeLists.txt
[AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
2021-05-07 17:01:27 -07:00
SMEInstrFormats.td
[AArch64][SME] Add mova instructions
2021-07-21 08:20:01 +00:00
SVEInstrFormats.td
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
SVEIntrinsicOpts.cpp
[AArch64][SVE] Move instcombine like transforms out of SVEIntrinsicOpts
2021-07-20 14:17:30 +00:00