Yi Zhang deebf18512 [mlir][linalg] Add pooling_nchw_max, conv_2d_nchw as yaml ops. ...

- Add pooling_nchw_max.
- Move conv_2d_nchw to yaml ops and add strides and dilation attributes.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D106658

2021-07-23 17:37:15 +00:00

..

Async/CPU

[mlir] Async: special handling for parallel loops with zero iterations

2021-07-23 01:22:59 -07:00

Linalg/CPU

[mlir][linalg] Add pooling_nchw_max, conv_2d_nchw as yaml ops.

2021-07-23 17:37:15 +00:00

LLVMIR/CPU

…

SparseTensor/CPU

[mlir][sparse] remove linalg-to-loops from integration tests

2021-07-15 09:14:46 -07:00

Standard/CPU

[mlir] factor memref-to-llvm lowering out of std-to-llvm

2021-07-09 14:49:52 +02:00

Vector/CPU

[mlir][memref] adjust integration tests to new lowering passes

2021-07-13 09:14:41 -07:00