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llvm-project/llvm/test/CodeGen
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Derek Schuff d4e2693a67 [WebAssembly] Run varargs codegen test with non-emscripten triple 
This is a followup from D105749 to cover both triples in the case
where they differ.
2021-07-13 14:31:19 -07:00
..
AArch64
[Tests] Fix test broken by: 43c7ca8e4963 [AArch64][GlobalISel] Legalize store <2 x i16>
2021-07-13 11:36:36 -07:00
AMDGPU
GlobalISel: Use extension instead of merge with undef in common case
2021-07-13 11:04:47 -04:00
ARC
…
ARM
[ARM] Add lowering of uadd_sat to uq{add|sub}8 and uq{add|sub}16
2021-07-11 15:58:11 +01:00
AVR
Place the BlockAddress type in the address space of the containing function
2021-07-02 12:17:55 +01:00
BPF
BPF: Add more relocation kinds
2021-05-25 08:19:13 -07:00
Generic
[llc] Default MCUseDwarfDirectory to true
2021-07-12 17:44:02 -07:00
Hexagon
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
Inputs
…
Lanai
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
M68k
[M68k][GloballSel] Lower outgoing return values in IRTranslator
2021-07-05 11:39:09 -07:00
Mips
Mips/GlobalISel: Use more standard call lowering infrastructure
2021-07-13 11:04:10 -04:00
MIR
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
MSP430
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
NVPTX
tests/CodeGen: Use %python lit substitution when invoking python
2021-07-06 18:46:36 -07:00
PowerPC
[PowerPC] Add FI alignment check if the addressing mode is DS/DQ-Form, emit X-Form if necessary.
2021-07-13 12:31:52 -05:00
RISCV
[RISCV] Use DIVUW/REMUW/DIVW instructions for i8/i16/i32 udiv/urem/sdiv when LHS is constant.
2021-07-13 10:33:57 -07:00
SPARC
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
SystemZ
[SystemZ] Bugfix for the 'N' code for inline asm operand.
2021-07-12 15:04:08 +02:00
Thumb
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
Thumb2
[ARM] Introduce MVEEXT ISel lowering
2021-07-13 07:21:20 +01:00
VE
[LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization.
2021-06-29 11:00:11 -07:00
WebAssembly
[WebAssembly] Run varargs codegen test with non-emscripten triple
2021-07-13 14:31:19 -07:00
WinCFGuard
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
WinEH
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
X86
[X86][SSE] X86ISD::FSETCC nodes (cmpss/cmpsd) return a 0/-1 allbits signbits result (REAPPLIED)
2021-07-13 12:31:09 +01:00
XCore
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00