Armv6 introduced instructions to perform 32-bit SIMD operations. The purpose of this pass is to do some straightforward IR pattern matching to create ACLE DSP intrinsics, which map on these 32-bit SIMD operations. Currently, only the SMLAD instruction gets recognised. This instruction performs two multiplications with 16-bit operands, and stores the result in an accumulator. We will follow this up with patches to recognise SMLAD in more cases, and also to generate other DSP instructions (like e.g. SADD16). Patch by: Sam Parker and Sjoerd Meijer Differential Revision: https://reviews.llvm.org/D48128 llvm-svn: 335850
46 lines
1.5 KiB
LLVM
46 lines
1.5 KiB
LLVM
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -parallel-dsp -S | FileCheck %s
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;
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; Muls with operands that are constants: not yet supported, so the rewrite
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; should not trigger (but we do want to add this soon).
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;
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; CHECK-NOT: call i32 @llvm.arm.smlad
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;
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define dso_local i32 @test(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
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entry:
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%cmp24 = icmp sgt i32 %arg, 0
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br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%.pre = load i16, i16* %arg3, align 2
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%.pre27 = load i16, i16* %arg2, align 2
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br label %for.body
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for.cond.cleanup:
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%mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
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ret i32 %mac1.0.lcssa
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for.body:
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%mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
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%i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%add = add nuw nsw i32 %i.025, 1
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%arrayidx3 = getelementptr inbounds i16, i16* %arg2, i32 %i.025
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%v2 = load i16, i16* %arrayidx3, align 2
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%conv = sext i16 %v2 to i32
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; RHS operand of this mul is a constant
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%mul = mul nsw i32 %conv, 43
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%arrayidx6 = getelementptr inbounds i16, i16* %arg2, i32 %add
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%v3 = load i16, i16* %arrayidx6, align 2
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%conv7 = sext i16 %v3 to i32
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; And this RHS operand is a constant too.
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%mul9 = mul nsw i32 %conv7, 42
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%add10 = add i32 %mul, %mac1.026
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%add11 = add i32 %mul9, %add10
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%exitcond = icmp ne i32 %add, %arg
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br i1 %exitcond, label %for.body, label %for.cond.cleanup
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}
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