123064dc39
This cc1 option -fallow-half-arguments-and-returns allows __fp16 to be passed by argument and returned, without giving an error. It is currently always enabled for Arm and AArch64, by forcing the option in the driver. This means any cc1 tests (especially those needing arm_neon.h) need to specify the option too, to prevent the error from being emitted. This changes it to a target option instead, set to true for Arm and AArch64. This allows the option to be removed. Previously it was implied by -fnative_half_arguments_and_returns, which is set for certain languages like open_cl, renderscript and hlsl, so that option now too controls the errors. There were are few other non-arm uses of -fallow-half-arguments-and-returns but I believe they were unnecessary. The strictfp_builtins.c tests were converted from __fp16 to _Float16 to avoid the issues. Differential Revision: https://reviews.llvm.org/D133885
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
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// RUN: -disable-O0-optnone \
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// RUN: -emit-llvm -o - %s | opt -S -sroa | FileCheck %s
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// REQUIRES: aarch64-registered-target
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#include <arm_sve.h>
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#include <stddef.h>
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// CHECK-LABEL: @subscript_int16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 8 x i16> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i16 [[VECEXT]]
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//
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int16_t subscript_int16(svint16_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_uint16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 8 x i16> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i16 [[VECEXT]]
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//
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uint16_t subscript_uint16(svuint16_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_int32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i32 [[VECEXT]]
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//
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int32_t subscript_int32(svint32_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_uint32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i32 [[VECEXT]]
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//
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uint32_t subscript_uint32(svuint32_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_int64(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 2 x i64> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i64 [[VECEXT]]
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//
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int64_t subscript_int64(svint64_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_uint64(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 2 x i64> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i64 [[VECEXT]]
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//
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uint64_t subscript_uint64(svuint64_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_float16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 8 x half> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret half [[VECEXT]]
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//
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__fp16 subscript_float16(svfloat16_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_float32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 4 x float> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret float [[VECEXT]]
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//
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float subscript_float32(svfloat32_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_float64(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 2 x double> [[A:%.*]], i64 [[B:%.*]]
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// CHECK-NEXT: ret double [[VECEXT]]
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//
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double subscript_float64(svfloat64_t a, size_t b) {
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return a[b];
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}
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