Emmmer 05ae747a53 [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV ...

Add:

- RV64C instructions sets.
- corresponding unittests.
- `c.break` code for lldb and lldb-server

Fix:
- wrong decoding of imm in `DecodeSType`

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D136362

2022-10-25 19:12:45 +08:00

..

ARM

[LLDB] Switch to RegisterInfo& for EmulateInstruction::WriteRegister

2022-10-11 13:24:55 +00:00

ARM64

[LLDB] Change EmulateInstriction::ReadRegister to return Optional

2022-10-12 08:37:36 +00:00

MIPS

[LLDB] Change EmulateInstriction::ReadRegister to return Optional

2022-10-12 08:37:36 +00:00

MIPS64

[LLDB] Change EmulateInstriction::ReadRegister to return Optional

2022-10-12 08:37:36 +00:00

PPC64

[LLDB] Remove the bool + RegisterInfo& version of GetRegisterInfo

2022-09-28 12:30:34 +00:00

RISCV

[LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-25 19:12:45 +08:00

CMakeLists.txt

[LLDB][RISCV] Make software single stepping work

2022-08-16 23:44:50 +08:00