55f1fbf005
Currently, when llvm-objdump is disassembling a code section and encounters a point where no instruction can be decoded, it uses the same policy on all targets: consume one byte of the section, emit it as "<unknown>", and try disassembling from the next byte position. On an architecture where instructions are always 4 bytes long and 4-byte aligned, this makes no sense at all. If a 4-byte word cannot be decoded as an instruction, then the next place that a valid instruction could //possibly// be found is 4 bytes further on. Disassembling from a misaligned address can't possibly produce anything that the code generator intended, or that the CPU would even attempt to execute. This patch introduces a new MCDisassembler virtual method called `suggestBytesToSkip`, which allows each target to choose its own resynchronization policy. For Arm (as opposed to Thumb) and AArch64, I've filled in the new method to return a fixed width of 4. Thumb is a more interesting case, because the criterion for identifying 2-byte and 4-byte instruction encodings is very simple, and doesn't require the particular instruction to be recognized. So `suggestBytesToSkip` is also passed an ArrayRef of the bytes in question, so that it can take that into account. The new test case shows Thumb disassembly skipping over two unrecognized instructions, and identifying one as 2-byte and one as 4-byte. For targets other than Arm and AArch64, this is NFC: the base class implementation of `suggestBytesToSkip` still returns 1, so that the existing behavior is unchanged. Other targets can fill in their own implementations as they see fit; I haven't attempted to choose a new behavior for each one myself. I've updated all the call sites of `MCDisassembler::getInstruction` in llvm-objdump, and also one in sancov, which was the only other place I spotted the same idiom of `if (Size == 0) Size = 1` after a call to `getInstruction`. Reviewed By: DavidSpickett Differential Revision: https://reviews.llvm.org/D130357
102 lines
3.4 KiB
C++
102 lines
3.4 KiB
C++
//===- MCDisassembler.cpp - Disassembler interface ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCDisassembler/MCDisassembler.h"
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#include "llvm/ADT/ArrayRef.h"
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using namespace llvm;
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MCDisassembler::~MCDisassembler() = default;
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Optional<MCDisassembler::DecodeStatus>
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MCDisassembler::onSymbolStart(SymbolInfoTy &Symbol, uint64_t &Size,
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ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &CStream) const {
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return None;
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}
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uint64_t MCDisassembler::suggestBytesToSkip(ArrayRef<uint8_t> Bytes,
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uint64_t Address) const {
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return 1;
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}
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bool MCDisassembler::tryAddingSymbolicOperand(MCInst &Inst, int64_t Value,
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uint64_t Address, bool IsBranch,
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uint64_t Offset, uint64_t OpSize,
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uint64_t InstSize) const {
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if (Symbolizer)
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return Symbolizer->tryAddingSymbolicOperand(Inst, *CommentStream, Value,
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Address, IsBranch, Offset,
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OpSize, InstSize);
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return false;
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}
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void MCDisassembler::tryAddingPcLoadReferenceComment(int64_t Value,
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uint64_t Address) const {
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if (Symbolizer)
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Symbolizer->tryAddingPcLoadReferenceComment(*CommentStream, Value, Address);
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}
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void MCDisassembler::setSymbolizer(std::unique_ptr<MCSymbolizer> Symzer) {
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Symbolizer = std::move(Symzer);
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}
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#define SMC_PCASE(A, P) \
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case XCOFF::XMC_##A: \
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return P;
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static uint8_t getSMCPriority(XCOFF::StorageMappingClass SMC) {
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switch (SMC) {
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SMC_PCASE(PR, 1)
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SMC_PCASE(RO, 1)
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SMC_PCASE(DB, 1)
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SMC_PCASE(GL, 1)
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SMC_PCASE(XO, 1)
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SMC_PCASE(SV, 1)
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SMC_PCASE(SV64, 1)
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SMC_PCASE(SV3264, 1)
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SMC_PCASE(TI, 1)
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SMC_PCASE(TB, 1)
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SMC_PCASE(RW, 1)
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SMC_PCASE(TC0, 0)
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SMC_PCASE(TC, 1)
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SMC_PCASE(TD, 1)
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SMC_PCASE(DS, 1)
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SMC_PCASE(UA, 1)
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SMC_PCASE(BS, 1)
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SMC_PCASE(UC, 1)
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SMC_PCASE(TL, 1)
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SMC_PCASE(UL, 1)
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SMC_PCASE(TE, 1)
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#undef SMC_PCASE
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}
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return 0;
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}
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/// The function is for symbol sorting when symbols have the same address.
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/// The symbols in the same section are sorted in ascending order.
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/// llvm-objdump -D will choose the highest priority symbol to display when
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/// there are symbols with the same address.
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bool XCOFFSymbolInfo::operator<(const XCOFFSymbolInfo &SymInfo) const {
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// Label symbols have higher priority than non-label symbols.
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if (IsLabel != SymInfo.IsLabel)
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return SymInfo.IsLabel;
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// Symbols with a StorageMappingClass have higher priority than those without.
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if (StorageMappingClass.has_value() !=
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SymInfo.StorageMappingClass.has_value())
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return SymInfo.StorageMappingClass.has_value();
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if (StorageMappingClass) {
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return getSMCPriority(StorageMappingClass.value()) <
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getSMCPriority(SymInfo.StorageMappingClass.value());
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}
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return false;
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}
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