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llvm-project/llvm/lib/Target/AArch64
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chenglin.bi 9403a8bc37 [GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel 
The miscompile case's G_ZEXT has a G_FREEZE source.  Similar to D127154, this patch removed isDef32, relying on the AArch64MIPeephole optimizer to remove redundant SUBREG_TO_REG nodes also in GISel.

Fix #58431

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D136433
2022-10-26 09:54:13 +08:00
..
AsmParser
[AArch64] Add SVE2.1 target feature for Armv9-A 2022 Architecture Extension
2022-10-21 14:02:32 +00:00
Disassembler
[AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers
2022-10-20 18:44:22 +01:00
GISel
[GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel
2022-10-26 09:54:13 +08:00
MCTargetDesc
[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources
2022-10-21 14:20:44 +01:00
TargetInfo
…
Utils
[AArch64][PAC] Add helper enum/functions to handle PAC keys/ops.
2022-10-24 08:15:17 -07:00
AArch64.h
[AArch64][SME] Add codegen pass to handle ZA state in arm_new_za functions.
2022-10-05 09:43:57 +00:00
AArch64.td
[AArch64] Add SVE2.1 target feature for Armv9-A 2022 Architecture Extension
2022-10-21 14:02:32 +00:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
…
AArch64AdvSIMDScalarPass.cpp
…
AArch64AsmPrinter.cpp
[AArch64] Generate SEH info for PAC instructions
2022-10-12 22:21:03 +03:00
AArch64BranchTargets.cpp
[AArch64] Add SEH_Nop opcodes for BTI hints
2022-10-11 14:32:01 +03:00
AArch64CallingConvention.cpp
…
AArch64CallingConvention.h
[ARM64EC 4/?] Add LLVM support for varargs calling convention.
2022-09-05 13:05:48 -07:00
AArch64CallingConvention.td
[AArch64][SME] Implement ABI for calls to/from streaming functions.
2022-09-16 14:07:47 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
[llvm] Call *set::insert without checking membership first (NFC)
2022-06-18 10:17:22 -07:00
AArch64Combine.td
[AArch64][GlobalISel] Make vector G_SEXT_INREG legal and allow combining.
2022-10-05 00:28:08 +01:00
AArch64CompressJumpTables.cpp
…
AArch64CondBrTuning.cpp
[AArch64][SVE] Use more flag-setting instructions
2022-10-25 09:02:21 +00:00
AArch64ConditionalCompares.cpp
[llvm] Don't including SetVector.h (NFC)
2022-09-17 12:36:43 -07:00
AArch64ConditionOptimizer.cpp
[Target] Qualify auto in range-based for loops (NFC)
2022-08-28 17:35:09 -07:00
AArch64DeadRegisterDefinitionsPass.cpp
…
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[AArch64][SME] Set up a lazy-save/restore around calls.
2022-10-05 14:36:53 +01:00
AArch64FalkorHWPFFix.cpp
[Target] use getSubtarget<> instead of static_cast<>(getSubtarget())
2022-05-26 11:22:41 -07:00
AArch64FastISel.cpp
[FastISel] Propagate PCSections metadata to MachineInstr
2022-09-07 11:36:01 +02:00
AArch64FrameLowering.cpp
Reapply [AArch64] Fix aligning the stack after calling __chkstk
2022-10-15 00:40:13 +03:00
AArch64FrameLowering.h
[Target] Remove unused forward declarations (NFC)
2022-08-07 00:16:16 -07:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
GlobalISel: Allow forming atomic/volatile G_ZEXTLOAD
2022-07-08 11:55:08 -04:00
AArch64InstrFormats.td
[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources
2022-10-21 14:20:44 +01:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add a target-specific G_BIT opcode.
2022-09-28 15:48:35 -07:00
AArch64InstrInfo.cpp
[AArch64][SVE] Use more flag-setting instructions
2022-10-25 09:02:21 +00:00
AArch64InstrInfo.h
[AArch64][SVE] Use more flag-setting instructions
2022-10-25 09:02:21 +00:00
AArch64InstrInfo.td
[AArch64][PAC] Select XPAC for ptrauth.strip intrinsic.
2022-10-24 08:15:56 -07:00
AArch64ISelDAGToDAG.cpp
[AArch64] Enhance bit-field-positioning op matcher to see through 'any_extend' for pattern 'and(any_extend(shl(val, N)), shifted-mask)'
2022-10-18 09:07:14 -07:00
AArch64ISelLowering.cpp
[AArch64][SME] Fix chain for arm_locally_streaming functions.
2022-10-25 08:14:51 +00:00
AArch64ISelLowering.h
[AArch64] Canonicalize ZERO_EXTEND to VSELECT
2022-10-17 15:42:46 +01:00
AArch64KCFI.cpp
KCFI sanitizer
2022-08-24 22:41:38 +00:00
AArch64LoadStoreOptimizer.cpp
[AAArch64][Windows] Fix the crash when running ninja check-asan
2022-10-21 22:11:54 +08:00
AArch64LowerHomogeneousPrologEpilog.cpp
[llvm] Use llvm::find (NFC)
2022-10-16 16:21:00 -07:00
AArch64MachineFunctionInfo.cpp
[AArch64] Generate SEH info for PAC instructions
2022-10-12 22:21:03 +03:00
AArch64MachineFunctionInfo.h
[AArch64][SME] Set up a lazy-save/restore around calls.
2022-10-05 14:36:53 +01:00
AArch64MachineScheduler.cpp
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
2022-08-08 11:24:15 -07:00
AArch64MachineScheduler.h
[AArch64] Order STP Q's by ascending address
2022-05-23 09:50:44 +01:00
AArch64MacroFusion.cpp
[AArch64] Fix scheduler crash in fusion code.
2022-10-20 10:47:44 -07:00
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
[Arm64EC] Refer to dllimport'ed functions correctly.
2022-10-20 15:08:56 -07:00
AArch64MCInstLower.h
…
AArch64MIPeepholeOpt.cpp
[llvm] Don't including SetVector.h (NFC)
2022-09-17 12:36:43 -07:00
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
[AArch64] Teach perfect shuffles tables about D-lane movs
2022-05-17 18:16:45 +01:00
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
…
AArch64RedundantCopyElimination.cpp
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
2022-08-08 11:24:15 -07:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64] SME2 Single-multi vector ternary int/FP 2 and 4 registers
2022-10-19 17:49:48 +01:00
AArch64RegisterInfo.h
[AArch64][SME] Set up a lazy-save/restore around calls.
2022-10-05 14:36:53 +01:00
AArch64RegisterInfo.td
[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers
2022-10-21 14:01:29 +01:00
AArch64SchedA53.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedA55.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedA57.td
[AArch64][NFC] Drop 'V' from ASIMD FP convert, other, D/Q-form regex
2022-07-14 09:32:20 +00:00
AArch64SchedA57WriteRes.td
…
AArch64SchedA64FX.td
[AArch64] Add SME 2 target feature for Armv8-A and Armv9-A 2022 Architecture Extension
2022-10-13 11:28:08 +01:00
AArch64SchedAmpere1.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedCyclone.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedExynosM3.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedExynosM4.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedExynosM5.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedFalkor.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedFalkorDetails.td
…
AArch64SchedKryo.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN2.td
[AArch64][SVE2] Add the SVE2.1 bfmlslb and bfmlslt instructions
2022-10-25 08:51:41 +00:00
AArch64SchedPredAmpere.td
…
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedThunderX2T99.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedThunderX3T110.td
[AArch64] Add SME 2 target feature for Armv8-A and Armv9-A 2022 Architecture Extension
2022-10-13 11:28:08 +01:00
AArch64SchedThunderX.td
[AArch64] Initial sched model for Neoverse N2
2022-07-08 09:39:13 +00:00
AArch64SchedTSV110.td
[AArch64] Fix sched model for tsv110
2022-08-25 19:20:07 +08:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[clang] Add support for __builtin_memset_inline
2022-06-10 13:13:59 +00:00
AArch64SelectionDAGInfo.h
[clang] Add support for __builtin_memset_inline
2022-06-10 13:13:59 +00:00
AArch64SIMDInstrOpt.cpp
[llvm] Qualify auto in range-based for loops (NFC)
2022-08-13 12:55:42 -07:00
AArch64SLSHardening.cpp
…
AArch64SMEInstrInfo.td
[AArch64]SME2 single-multi and multi-multi INT dot product instructions[part2]
2022-10-25 18:32:20 +01:00
AArch64SpeculationHardening.cpp
[Target] Qualify auto in range-based for loops (NFC)
2022-08-28 17:35:09 -07:00
AArch64StackTagging.cpp
[MTE] [HWASan] unify isInterestingAlloca
2022-09-28 15:52:34 -07:00
AArch64StackTaggingPreRA.cpp
Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options
2022-06-05 00:31:44 -07:00
AArch64StorePairSuppress.cpp
…
AArch64Subtarget.cpp
[Arm64EC] Refer to dllimport'ed functions correctly.
2022-10-20 15:08:56 -07:00
AArch64Subtarget.h
[AArch64][SME] Disable (SLP|Loop)Vectorizer when function may be executed in streaming mode.
2022-10-19 16:42:20 +00:00
AArch64SVEInstrInfo.td
[AArch64][SVE2] Add the SVE2.1 signed and unsigned 2-way dot instructions
2022-10-25 10:26:17 +00:00
AArch64SystemOperands.td
[AArch64] Add target feature "all"
2022-06-30 10:37:58 -07:00
AArch64TargetMachine.cpp
[AArch64] Fix minor issue introduced in D135950.
2022-10-19 17:01:41 +00:00
AArch64TargetMachine.h
…
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
…
AArch64TargetTransformInfo.cpp
[AArch64][SME] Disable (SLP|Loop)Vectorizer when function may be executed in streaming mode.
2022-10-19 16:42:20 +00:00
AArch64TargetTransformInfo.h
[AArch64][SME] Disable (SLP|Loop)Vectorizer when function may be executed in streaming mode.
2022-10-19 16:42:20 +00:00
CMakeLists.txt
[AArch64][SME] Add codegen pass to handle ZA state in arm_new_za functions.
2022-10-05 09:43:57 +00:00
SMEABIPass.cpp
[AArch64][SME] Add codegen pass to handle ZA state in arm_new_za functions.
2022-10-05 09:43:57 +00:00
SMEInstrFormats.td
[AArch64]SME2 single-multi and multi-multi INT/FP dot product instructions
2022-10-25 18:28:11 +01:00
SVEInstrFormats.td
[AArch64][SVE2] Add the SVE2.1 signed and unsigned 2-way dot instructions
2022-10-25 10:26:17 +00:00
SVEIntrinsicOpts.cpp
[IR] Move vector.insert/vector.extract out of experimental namespace
2022-06-27 10:48:45 +00:00