b586dc21a7
The CPU is used to determine which inline asm instructions are allowed, so needs to be copied across in case the outlined function contains any.
109 lines
3.5 KiB
LLVM
109 lines
3.5 KiB
LLVM
; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin -mcpu=cortex-a53 -enable-misched=false < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -enable-linkonceodr-outlining -mtriple=aarch64-apple-darwin < %s | FileCheck %s -check-prefix=ODR
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; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin -stop-after=machine-outliner < %s | FileCheck %s -check-prefix=TARGET_FEATURES
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; Make sure that we inherit target features from functions and make sure we have
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; the right function attributes.
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; TARGET_FEATURES: define internal void @OUTLINED_FUNCTION_{{[0-9]+}}()
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; TARGET_FEATURES-SAME: #[[ATTR_NUM:[0-9]+]]
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; TARGET_FEATURES-DAG: attributes #[[ATTR_NUM]] = {
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; TARGET_FEATURES-SAME: minsize
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; TARGET_FEATURES-SAME: nounwind
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; TARGET_FEATURES-SAME: optsize
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; TARGET_FEATURES-SAME: "target-cpu"="cyclone"
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; TARGET_FEATURES-SAME: "target-features"="+sse"
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define linkonce_odr void @fish() #0 {
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; CHECK-LABEL: _fish:
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; CHECK-NOT: OUTLINED
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; ODR: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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define void @turtle() section "TURTLE,turtle" {
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; CHECK-LABEL: _turtle:
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; ODR-LABEL: _turtle:
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; CHECK-NOT: OUTLINED
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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define void @cat() #0 {
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; CHECK-LABEL: _cat:
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; CHECK: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
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; ODR: [[OUTLINED]]
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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define void @dog() #0 {
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; CHECK-LABEL: _dog:
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; CHECK: [[OUTLINED]]
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; ODR: [[OUTLINED]]
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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%6 = alloca i32, align 4
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store i32 1, i32* %1, align 4
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store i32 2, i32* %2, align 4
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store i32 3, i32* %3, align 4
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store i32 4, i32* %4, align 4
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store i32 5, i32* %5, align 4
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store i32 6, i32* %6, align 4
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ret void
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}
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; ODR: [[OUTLINED]]:
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; CHECK: .p2align 2
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; CHECK-NEXT: [[OUTLINED]]:
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; CHECK: mov w9, #1
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; CHECK-DAG: mov w8, #2
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; CHECK-DAG: stp w8, w9, [sp, #24]
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; CHECK-DAG: mov w9, #3
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; CHECK-DAG: mov w8, #4
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; CHECK-DAG: stp w8, w9, [sp, #16]
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; CHECK-DAG: mov w9, #5
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; CHECK-DAG: mov w8, #6
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; CHECK-DAG: stp w8, w9, [sp, #8]
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; CHECK-DAG: add sp, sp, #32
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; CHECK-DAG: ret
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attributes #0 = { nounwind noredzone "target-cpu"="cyclone" "target-features"="+sse" }
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