0f1b5f115a
ptxas is a proprietary compiler from Nvidia that can compile PTX to machine code (SASS). It has a lot of diagnostics to catch errors in PTX, which can be used to verify PTX output from llc. Set -DPXTAS_EXECUTABLE=/path/to/ptxas CMake option to enable it. If this option is not set, then ptxas is substituted to true which effectively disables all ptxas RUN lines. LLVM_PTXAS_EXECUTABLE environment variable takes precedence over the CMake option, and allows to override ptxas executable that is used for LIT without complete re-configuration. Differential Revision: https://reviews.llvm.org/D121727
113 lines
4.5 KiB
LLVM
113 lines
4.5 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_80 -mattr=+ptx70 | FileCheck -check-prefixes=ALL,CHECK_PTX32 %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | FileCheck -check-prefixes=ALL,CHECK_PTX64 %s
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; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx -mcpu=sm_80 -mattr=+ptx70 | %ptxas-verify -arch=sm_80 %}
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; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | %ptxas-verify -arch=sm_80 %}
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declare void @llvm.nvvm.cp.async.wait.group(i32)
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; ALL-LABEL: asyncwaitgroup
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define void @asyncwaitgroup() {
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; ALL: cp.async.wait_group 8;
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tail call void @llvm.nvvm.cp.async.wait.group(i32 8)
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; ALL: cp.async.wait_group 0;
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tail call void @llvm.nvvm.cp.async.wait.group(i32 0)
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; ALL: cp.async.wait_group 16;
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tail call void @llvm.nvvm.cp.async.wait.group(i32 16)
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ret void
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}
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declare void @llvm.nvvm.cp.async.wait.all()
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; ALL-LABEL: asyncwaitall
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define void @asyncwaitall() {
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; ALL: cp.async.wait_all
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tail call void @llvm.nvvm.cp.async.wait.all()
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ret void
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}
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declare void @llvm.nvvm.cp.async.commit.group()
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; ALL-LABEL: asynccommitgroup
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define void @asynccommitgroup() {
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; ALL: cp.async.commit_group
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tail call void @llvm.nvvm.cp.async.commit.group()
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ret void
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}
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declare void @llvm.nvvm.cp.async.mbarrier.arrive(i64* %a)
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declare void @llvm.nvvm.cp.async.mbarrier.arrive.shared(i64 addrspace(3)* %a)
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declare void @llvm.nvvm.cp.async.mbarrier.arrive.noinc(i64* %a)
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declare void @llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared(i64 addrspace(3)* %a)
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; CHECK-LABEL: asyncmbarrier
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define void @asyncmbarrier(i64* %a) {
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; CHECK_PTX32: cp.async.mbarrier.arrive.b64 [%r{{[0-9]+}}];
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; CHECK_PTX64: cp.async.mbarrier.arrive.b64 [%rd{{[0-9]+}}];
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tail call void @llvm.nvvm.cp.async.mbarrier.arrive(i64* %a)
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ret void
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}
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; CHECK-LABEL: asyncmbarriershared
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define void @asyncmbarriershared(i64 addrspace(3)* %a) {
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; CHECK_PTX32: cp.async.mbarrier.arrive.shared.b64 [%r{{[0-9]+}}];
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; CHECK_PTX64: cp.async.mbarrier.arrive.shared.b64 [%rd{{[0-9]+}}];
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tail call void @llvm.nvvm.cp.async.mbarrier.arrive.shared(i64 addrspace(3)* %a)
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ret void
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}
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; CHECK-LABEL: asyncmbarriernoinc
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define void @asyncmbarriernoinc(i64* %a) {
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; CHECK_PTX32: cp.async.mbarrier.arrive.noinc.b64 [%r{{[0-9]+}}];
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; CHECK_PTX64: cp.async.mbarrier.arrive.noinc.b64 [%rd{{[0-9]+}}];
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tail call void @llvm.nvvm.cp.async.mbarrier.arrive.noinc(i64* %a)
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ret void
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}
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; CHECK-LABEL: asyncmbarriernoincshared
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define void @asyncmbarriernoincshared(i64 addrspace(3)* %a) {
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; CHECK_PTX32: cp.async.mbarrier.arrive.noinc.shared.b64 [%r{{[0-9]+}}];
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; CHECK_PTX64: cp.async.mbarrier.arrive.noinc.shared.b64 [%rd{{[0-9]+}}];
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tail call void @llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared(i64 addrspace(3)* %a)
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ret void
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}
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declare void @llvm.nvvm.cp.async.ca.shared.global.4(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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; CHECK-LABEL: asynccasharedglobal4i8
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define void @asynccasharedglobal4i8(i8 addrspace(3)* %a, i8 addrspace(1)* %b) {
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; CHECK_PTX32: cp.async.ca.shared.global [%r{{[0-9]+}}], [%r{{[0-9]+}}], 4;
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; CHECK_PTX64: cp.async.ca.shared.global [%rd{{[0-9]+}}], [%rd{{[0-9]+}}], 4;
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tail call void @llvm.nvvm.cp.async.ca.shared.global.4(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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ret void
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}
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declare void @llvm.nvvm.cp.async.ca.shared.global.8(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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; CHECK-LABEL: asynccasharedglobal8i8
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define void @asynccasharedglobal8i8(i8 addrspace(3)* %a, i8 addrspace(1)* %b) {
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; CHECK_PTX32: cp.async.ca.shared.global [%r{{[0-9]+}}], [%r{{[0-9]+}}], 8;
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; CHECK_PTX64: cp.async.ca.shared.global [%rd{{[0-9]+}}], [%rd{{[0-9]+}}], 8;
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tail call void @llvm.nvvm.cp.async.ca.shared.global.8(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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ret void
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}
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declare void @llvm.nvvm.cp.async.ca.shared.global.16(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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; CHECK-LABEL: asynccasharedglobal16i8
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define void @asynccasharedglobal16i8(i8 addrspace(3)* %a, i8 addrspace(1)* %b) {
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; CHECK_PTX32: cp.async.ca.shared.global [%r{{[0-9]+}}], [%r{{[0-9]+}}], 16;
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; CHECK_PTX64: cp.async.ca.shared.global [%rd{{[0-9]+}}], [%rd{{[0-9]+}}], 16;
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tail call void @llvm.nvvm.cp.async.ca.shared.global.16(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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ret void
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}
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declare void @llvm.nvvm.cp.async.cg.shared.global.16(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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; CHECK-LABEL: asynccgsharedglobal16i8
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define void @asynccgsharedglobal16i8(i8 addrspace(3)* %a, i8 addrspace(1)* %b) {
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; CHECK_PTX32: cp.async.cg.shared.global [%r{{[0-9]+}}], [%r{{[0-9]+}}], 16;
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; CHECK_PTX64: cp.async.cg.shared.global [%rd{{[0-9]+}}], [%rd{{[0-9]+}}], 16;
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tail call void @llvm.nvvm.cp.async.cg.shared.global.16(i8 addrspace(3)* %a, i8 addrspace(1)* %b)
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ret void
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}
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