d89d45ca9a
This changes the default value used for mask policy from mask undisturbed to mask agnostic. In hardware, there may be a minor preference for ta/ma, but since this is only going to apply to instructions which don't use the mask policy bit, this is functionally mostly a nop. The main value is to make future changes to using MA when legal for masked instructions easier to review by reducing test churn. The prior code was motivated by a desire to minimize state transitions between masked and unmasked code. This patch achieves the same effect using the demanded field logic (landed in afb45ff), and there are no regressions I spotted in the test diffs. (Given the size, I have only been able to skim.) I do want to call out that regressions are possible here; the demanded analysis only works on a block local scope right now, so e.g. a tight loop mixing masked and unmasked computation might see an extra vsetvli or two. Differential Revision: https://reviews.llvm.org/D133803
35 lines
1.4 KiB
LLVM
35 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -start-after codegenprepare -mtriple=riscv64 -mattr=-v -o - %s | FileCheck --check-prefix=CHECK-NOV %s
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; RUN: llc -start-after codegenprepare -mtriple=riscv64 -mattr=+v -o - %s | FileCheck --check-prefix=CHECK-V %s
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; Reproducer for https://github.com/llvm/llvm-project/issues/55168.
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; We should always return 1 (and not -1).
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define i32 @test(i32 %call.i) {
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; CHECK-NOV-LABEL: test:
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; CHECK-NOV: # %bb.0:
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; CHECK-NOV-NEXT: li a0, 1
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; CHECK-NOV-NEXT: ret
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;
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; CHECK-V-LABEL: test:
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; CHECK-V: # %bb.0:
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; CHECK-V-NEXT: lui a1, 524288
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; CHECK-V-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-V-NEXT: vmv.v.x v8, a1
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; CHECK-V-NEXT: vsetvli zero, zero, e32, mf2, tu, ma
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; CHECK-V-NEXT: vmv.s.x v8, a0
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; CHECK-V-NEXT: addiw a0, a1, 2
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; CHECK-V-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
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; CHECK-V-NEXT: vmslt.vx v0, v8, a0
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; CHECK-V-NEXT: vmv.v.i v8, 0
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; CHECK-V-NEXT: vmerge.vim v8, v8, 1, v0
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; CHECK-V-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
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; CHECK-V-NEXT: vslidedown.vi v8, v8, 1
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; CHECK-V-NEXT: vmv.x.s a0, v8
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; CHECK-V-NEXT: ret
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%t2 = insertelement <2 x i32> <i32 poison, i32 -2147483648>, i32 %call.i, i64 0
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%t3 = icmp slt <2 x i32> %t2, <i32 -2147483646, i32 -2147483646>
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%t4 = zext <2 x i1> %t3 to <2 x i32>
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%t6 = extractelement <2 x i32> %t4, i64 1
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ret i32 %t6
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}
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