c2e7c9cb33
In https://github.com/llvm/llvm-project/issues/57452, we found that IRTranslator is translating `i1 true` into `i32 -1`. This is because IRTranslator uses SExt for indices. In this fix, we change the expected behavior of extractelement's index, moving from SExt to ZExt. This change includes both documentation, SelectionDAG and IRTranslator. We also included a test for AMDGPU, updated tests for AArch64, Mips, PowerPC, RISCV, VE, WebAssembly and X86 This patch fixes issue #57452. Differential Revision: https://reviews.llvm.org/D132978
130 lines
3.8 KiB
LLVM
130 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
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define void @test1(ptr %F, ptr %f) nounwind {
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; X32-LABEL: test1:
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; X32: # %bb.0: # %entry
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X32-NEXT: addss %xmm0, %xmm0
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; X32-NEXT: movss %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X64-NEXT: addss %xmm0, %xmm0
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; X64-NEXT: movss %xmm0, (%rsi)
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; X64-NEXT: retq
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entry:
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%tmp = load <4 x float>, ptr %F
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%tmp7 = fadd <4 x float> %tmp, %tmp
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%tmp2 = extractelement <4 x float> %tmp7, i32 0
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store float %tmp2, ptr %f
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ret void
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}
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define float @test2(ptr %F, ptr %f) nounwind {
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; X32-LABEL: test2:
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; X32: # %bb.0: # %entry
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; X32-NEXT: pushl %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movaps (%eax), %xmm0
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; X32-NEXT: addps %xmm0, %xmm0
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; X32-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
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; X32-NEXT: movss %xmm0, (%esp)
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; X32-NEXT: flds (%esp)
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; X32-NEXT: popl %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movaps (%rdi), %xmm0
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; X64-NEXT: addps %xmm0, %xmm0
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; X64-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
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; X64-NEXT: retq
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entry:
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%tmp = load <4 x float>, ptr %F
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%tmp7 = fadd <4 x float> %tmp, %tmp
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%tmp2 = extractelement <4 x float> %tmp7, i32 2
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ret float %tmp2
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}
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define void @test3(ptr %R, ptr %P1) nounwind {
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; X32-LABEL: test3:
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; X32: # %bb.0: # %entry
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movaps (%ecx), %xmm0
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; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
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; X32-NEXT: movss %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: test3:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movaps (%rsi), %xmm0
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; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
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; X64-NEXT: movss %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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%X = load <4 x float>, ptr %P1
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%tmp = extractelement <4 x float> %X, i32 3
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store float %tmp, ptr %R
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ret void
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}
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define double @test4(double %A) nounwind {
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; X32-LABEL: test4:
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; X32: # %bb.0: # %entry
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: calll foo@PLT
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; X32-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
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; X32-NEXT: addsd {{[0-9]+}}(%esp), %xmm0
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; X32-NEXT: movsd %xmm0, (%esp)
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; X32-NEXT: fldl (%esp)
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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;
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; X64-LABEL: test4:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: movsd %xmm0, (%rsp) # 8-byte Spill
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; X64-NEXT: callq foo@PLT
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; X64-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
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; X64-NEXT: addsd (%rsp), %xmm0 # 8-byte Folded Reload
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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entry:
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%tmp1 = call <2 x double> @foo( )
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%tmp2 = extractelement <2 x double> %tmp1, i32 1
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%tmp3 = fadd double %tmp2, %A
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ret double %tmp3
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}
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declare <2 x double> @foo()
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; OSS-Fuzz #15662
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; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15662
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define <4 x i32> @ossfuzz15662(ptr %in) {
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; X32-LABEL: ossfuzz15662:
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; X32: # %bb.0:
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; X32-NEXT: xorps %xmm0, %xmm0
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; X32-NEXT: movaps %xmm0, (%eax)
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; X32-NEXT: xorps %xmm0, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: ossfuzz15662:
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; X64: # %bb.0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, (%rax)
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: retq
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%C10 = icmp ule i1 false, false
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%C3 = icmp ule i1 true, undef
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%B = sdiv i1 %C10, %C3
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%I = insertelement <4 x i32> zeroinitializer, i32 0, i1 %B
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store <4 x i32> %I, ptr undef
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ret <4 x i32> zeroinitializer
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}
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