4ab40eca08
These tests cases were converted using the script at https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34 Differential Revision: https://reviews.llvm.org/D135094
256 lines
11 KiB
LLVM
256 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
; RUN: opt -S -passes=instcombine < %s | FileCheck %s --check-prefixes=CHECK,LITTLE
|
|
; RUN: opt -S -passes=instcombine -data-layout="E" < %s | FileCheck %s --check-prefixes=CHECK,BIG
|
|
|
|
define i8 @load_smaller_int(ptr %p) {
|
|
; LITTLE-LABEL: @load_smaller_int(
|
|
; LITTLE-NEXT: store i16 258, ptr [[P:%.*]], align 2
|
|
; LITTLE-NEXT: ret i8 2
|
|
;
|
|
; BIG-LABEL: @load_smaller_int(
|
|
; BIG-NEXT: store i16 258, ptr [[P:%.*]], align 2
|
|
; BIG-NEXT: ret i8 1
|
|
;
|
|
store i16 258, ptr %p
|
|
%load = load i8, ptr %p
|
|
ret i8 %load
|
|
}
|
|
|
|
; This case can *not* be forwarded, as we only see part of the stored value.
|
|
define i32 @load_larger_int(ptr %p) {
|
|
; CHECK-LABEL: @load_larger_int(
|
|
; CHECK-NEXT: store i16 258, ptr [[P:%.*]], align 2
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 4
|
|
; CHECK-NEXT: ret i32 [[LOAD]]
|
|
;
|
|
store i16 258, ptr %p
|
|
%load = load i32, ptr %p
|
|
ret i32 %load
|
|
}
|
|
|
|
define i32 @vec_store_load_first(ptr %p) {
|
|
; CHECK-LABEL: @vec_store_load_first(
|
|
; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 8
|
|
; CHECK-NEXT: ret i32 1
|
|
;
|
|
store <2 x i32> <i32 1, i32 2>, ptr %p
|
|
%load = load i32, ptr %p
|
|
ret i32 %load
|
|
}
|
|
|
|
define i17 @vec_store_load_first_odd_size(ptr %p) {
|
|
; CHECK-LABEL: @vec_store_load_first_odd_size(
|
|
; CHECK-NEXT: store <2 x i17> <i17 1, i17 2>, ptr [[P:%.*]], align 8
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i17, ptr [[P]], align 4
|
|
; CHECK-NEXT: ret i17 [[LOAD]]
|
|
;
|
|
store <2 x i17> <i17 1, i17 2>, ptr %p
|
|
%load = load i17, ptr %p
|
|
ret i17 %load
|
|
}
|
|
|
|
define i32 @vec_store_load_first_constexpr(ptr %p) {
|
|
; CHECK-LABEL: @vec_store_load_first_constexpr(
|
|
; CHECK-NEXT: store <2 x i32> bitcast (i64 ptrtoint (ptr @vec_store_load_first to i64) to <2 x i32>), ptr [[P:%.*]], align 8
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 4
|
|
; CHECK-NEXT: ret i32 [[LOAD]]
|
|
;
|
|
store <2 x i32> bitcast (i64 ptrtoint (ptr @vec_store_load_first to i64) to <2 x i32>), ptr %p, align 8
|
|
%load = load i32, ptr %p, align 4
|
|
ret i32 %load
|
|
}
|
|
|
|
define i32 @vec_store_load_second(ptr %p) {
|
|
; CHECK-LABEL: @vec_store_load_second(
|
|
; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 8
|
|
; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P]], i64 1
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P3]], align 4
|
|
; CHECK-NEXT: ret i32 [[LOAD]]
|
|
;
|
|
store <2 x i32> <i32 1, i32 2>, ptr %p
|
|
%p3 = getelementptr i32, ptr %p, i64 1
|
|
%load = load i32, ptr %p3
|
|
ret i32 %load
|
|
}
|
|
|
|
define i64 @vec_store_load_whole(ptr %p) {
|
|
; LITTLE-LABEL: @vec_store_load_whole(
|
|
; LITTLE-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 8
|
|
; LITTLE-NEXT: ret i64 8589934593
|
|
;
|
|
; BIG-LABEL: @vec_store_load_whole(
|
|
; BIG-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 8
|
|
; BIG-NEXT: ret i64 4294967298
|
|
;
|
|
store <2 x i32> <i32 1, i32 2>, ptr %p
|
|
%load = load i64, ptr %p
|
|
ret i64 %load
|
|
}
|
|
|
|
define i32 @vec_store_load_overlap(ptr %p) {
|
|
; CHECK-LABEL: @vec_store_load_overlap(
|
|
; CHECK-NEXT: store <2 x i32> <i32 1, i32 2>, ptr [[P:%.*]], align 8
|
|
; CHECK-NEXT: [[P4:%.*]] = getelementptr i8, ptr [[P]], i64 2
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P4]], align 2
|
|
; CHECK-NEXT: ret i32 [[LOAD]]
|
|
;
|
|
store <2 x i32> <i32 1, i32 2>, ptr %p
|
|
%p4 = getelementptr i8, ptr %p, i64 2
|
|
%load = load i32, ptr %p4, align 2
|
|
ret i32 %load
|
|
}
|
|
|
|
define i32 @load_i32_store_nxv4i32(ptr %a) {
|
|
; CHECK-LABEL: @load_i32_store_nxv4i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
|
|
; CHECK-NEXT: ret i32 [[TMP1]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%0 = load i32, ptr %a, align 4
|
|
ret i32 %0
|
|
}
|
|
|
|
define i64 @load_i64_store_nxv8i8(ptr %a) {
|
|
; CHECK-LABEL: @load_i64_store_nxv8i8(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 8 x i8> shufflevector (<vscale x 8 x i8> insertelement (<vscale x 8 x i8> poison, i8 1, i32 0), <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr [[A]], align 8
|
|
; CHECK-NEXT: ret i64 [[LOAD]]
|
|
;
|
|
entry:
|
|
store <vscale x 8 x i8> shufflevector (<vscale x 8 x i8> insertelement (<vscale x 8 x i8> poison, i8 1, i32 0), <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer), ptr %a, align 16
|
|
%load = load i64, ptr %a, align 8
|
|
ret i64 %load
|
|
}
|
|
|
|
define i64 @load_i64_store_nxv4i32(ptr %a) {
|
|
; CHECK-LABEL: @load_i64_store_nxv4i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr [[A]], align 8
|
|
; CHECK-NEXT: ret i64 [[LOAD]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%load = load i64, ptr %a, align 8
|
|
ret i64 %load
|
|
}
|
|
|
|
define i8 @load_i8_store_nxv4i32(ptr %a) {
|
|
; CHECK-LABEL: @load_i8_store_nxv4i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr [[A]], align 1
|
|
; CHECK-NEXT: ret i8 [[LOAD]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%load = load i8, ptr %a, align 1
|
|
ret i8 %load
|
|
}
|
|
|
|
define float @load_f32_store_nxv4f32(ptr %a) {
|
|
; CHECK-LABEL: @load_f32_store_nxv4f32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[A]], align 4
|
|
; CHECK-NEXT: ret float [[TMP1]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.0, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%0 = load float, ptr %a, align 4
|
|
ret float %0
|
|
}
|
|
|
|
define i32 @load_i32_store_nxv4f32(ptr %a) {
|
|
; CHECK-LABEL: @load_i32_store_nxv4f32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[A]], align 4
|
|
; CHECK-NEXT: ret i32 [[LOAD]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.0, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%load = load i32, ptr %a, align 4
|
|
ret i32 %load
|
|
}
|
|
|
|
define <4 x i32> @load_v4i32_store_nxv4i32(ptr %a) {
|
|
; CHECK-LABEL: @load_v4i32_store_nxv4i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[A]], align 16
|
|
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%0 = load <4 x i32>, ptr %a, align 16
|
|
ret <4 x i32> %0
|
|
}
|
|
|
|
define <4 x i16> @load_v4i16_store_nxv4i32(ptr %a) {
|
|
; CHECK-LABEL: @load_v4i16_store_nxv4i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[A]], align 16
|
|
; CHECK-NEXT: ret <4 x i16> [[TMP2]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%0 = load <4 x i16>, ptr %a, align 16
|
|
ret <4 x i16> %0
|
|
}
|
|
|
|
; Loaded data type exceeds the known minimum size of the store.
|
|
define i64 @load_i64_store_nxv4i8(ptr %a) {
|
|
; CHECK-LABEL: @load_i64_store_nxv4i8(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i8> shufflevector (<vscale x 4 x i8> insertelement (<vscale x 4 x i8> poison, i8 1, i32 0), <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr [[A]], align 8
|
|
; CHECK-NEXT: ret i64 [[LOAD]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i8> shufflevector (<vscale x 4 x i8> insertelement (<vscale x 4 x i8> poison, i8 1, i32 0), <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%load = load i64, ptr %a, align 8
|
|
ret i64 %load
|
|
}
|
|
|
|
; Loaded data size is unknown - we cannot guarantee it won't
|
|
; exceed the store size.
|
|
define <vscale x 4 x i8> @load_nxv4i8_store_nxv4i32(ptr %a) {
|
|
; CHECK-LABEL: @load_nxv4i8_store_nxv4i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
|
|
; CHECK-NEXT: [[TMP2:%.*]] = load <vscale x 4 x i8>, ptr [[A]], align 16
|
|
; CHECK-NEXT: ret <vscale x 4 x i8> [[TMP2]]
|
|
;
|
|
entry:
|
|
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
|
|
%0 = load <vscale x 4 x i8>, ptr %a, align 16
|
|
ret <vscale x 4 x i8> %0
|
|
}
|
|
|
|
define i8 @load_i8_store_i1(ptr %a) {
|
|
; CHECK-LABEL: @load_i8_store_i1(
|
|
; CHECK-NEXT: store i1 true, ptr [[A:%.*]], align 1
|
|
; CHECK-NEXT: [[V:%.*]] = load i8, ptr [[A]], align 1
|
|
; CHECK-NEXT: ret i8 [[V]]
|
|
;
|
|
store i1 true, ptr %a
|
|
%v = load i8, ptr %a
|
|
ret i8 %v
|
|
}
|
|
|
|
define i1 @load_i1_store_i8(ptr %a) {
|
|
; CHECK-LABEL: @load_i1_store_i8(
|
|
; CHECK-NEXT: store i8 1, ptr [[A:%.*]], align 1
|
|
; CHECK-NEXT: ret i1 true
|
|
;
|
|
store i8 1, ptr %a
|
|
%v = load i1, ptr %a
|
|
ret i1 %v
|
|
}
|