c2a3888793
Using Max for both "PIC Level" and "PIE Level" is inconsistent. PIC imposes less restriction while PIE imposes more restriction. The result generally picks the more restrictive behavior: Min for PIC. This choice matches `ld -r`: a non-pic object and a pic object merge into a result which should be treated as non-pic. To allow linking "PIC Level" using Error/Max from old bitcode files, upgrade Error/Max to Min. Reviewed By: tejohnson Differential Revision: https://reviews.llvm.org/D130531
170 lines
9.5 KiB
LLVM
170 lines
9.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
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; RUN: opt -S -passes=openmp-opt < %s | FileCheck %s
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; void foo(double x) {
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; #pragma omp target map(from:x)
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; {
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; x = sin(M_PI);
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; #pragma omp parallel
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; { }
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; }
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; }
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target triple = "nvptx64"
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%struct.ident_t = type { i32, i32, i32, i32, i8* }
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@0 = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00", align 1
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@1 = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @0, i32 0, i32 0) }, align 8
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@__omp_offloading_fd02_404433c2_main_l5_exec_mode = weak constant i8 1
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@llvm.compiler.used = appending global [1 x i8*] [i8* @__omp_offloading_fd02_404433c2_main_l5_exec_mode], section "llvm.metadata"
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; Function Attrs: alwaysinline convergent norecurse nounwind
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;.
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; CHECK: @[[GLOB0:[0-9]+]] = private unnamed_addr constant [23 x i8] c"
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; CHECK: @[[GLOB1:[0-9]+]] = private unnamed_addr constant [[STRUCT_IDENT_T:%.*]] { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @[[GLOB0]], i32 0, i32 0) }, align 8
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; CHECK: @[[__OMP_OFFLOADING_FD02_404433C2_MAIN_L5_EXEC_MODE:[a-zA-Z0-9_$"\\.-]+]] = weak constant i8 3
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; CHECK: @[[LLVM_COMPILER_USED:[a-zA-Z0-9_$"\\.-]+]] = appending global [1 x i8*] [i8* @__omp_offloading_fd02_404433c2_main_l5_exec_mode], section "llvm.metadata"
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; CHECK: @[[GLOB2:[0-9]+]] = private unnamed_addr constant [[STRUCT_IDENT_T:%.*]] { i32 0, i32 2, i32 0, i32 22, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @[[GLOB0]], i32 0, i32 0) }, align 8
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;.
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define weak void @__omp_offloading_fd02_404433c2_main_l5(double* nonnull align 8 dereferenceable(8) %x) local_unnamed_addr #0 {
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; CHECK-LABEL: define {{[^@]+}}@__omp_offloading_fd02_404433c2_main_l5
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; CHECK-SAME: (double* nonnull align 8 dereferenceable(8) [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* nonnull @[[GLOB1]], i8 2, i1 false, i1 false) #[[ATTR3:[0-9]+]]
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; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
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; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: user_code.entry:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* nonnull @[[GLOB1]]) #[[ATTR3]]
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; CHECK-NEXT: [[CALL_I:%.*]] = call double @__nv_sin(double 0x400921FB54442D18) #[[ATTR7:[0-9]+]]
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; CHECK-NEXT: br label [[REGION_CHECK_TID:%.*]]
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; CHECK: region.check.tid:
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
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; CHECK-NEXT: br i1 [[TMP3]], label [[REGION_GUARDED:%.*]], label [[REGION_BARRIER:%.*]]
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; CHECK: region.guarded:
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; CHECK-NEXT: store double [[CALL_I]], double* [[X]], align 8, !tbaa [[TBAA8:![0-9]+]]
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; CHECK-NEXT: br label [[REGION_GUARDED_END:%.*]]
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; CHECK: region.guarded.end:
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; CHECK-NEXT: br label [[REGION_BARRIER]]
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; CHECK: region.barrier:
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; CHECK-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
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; CHECK-NEXT: br label [[REGION_EXIT:%.*]]
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; CHECK: region.exit:
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [0 x i8*], [0 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
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; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* nonnull @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__ to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8*), i8** nonnull [[TMP4]], i64 0) #[[ATTR3]]
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; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* nonnull @[[GLOB1]], i8 2, i1 false) #[[ATTR3]]
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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entry:
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%captured_vars_addrs = alloca [0 x i8*], align 8
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%0 = call i32 @__kmpc_target_init(%struct.ident_t* nonnull @1, i8 1, i1 true, i1 true) #3
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%exec_user_code = icmp eq i32 %0, -1
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br i1 %exec_user_code, label %user_code.entry, label %common.ret
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common.ret: ; preds = %entry, %user_code.entry
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ret void
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user_code.entry: ; preds = %entry
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%1 = call i32 @__kmpc_global_thread_num(%struct.ident_t* nonnull @1)
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%call.i = call double @__nv_sin(double 0x400921FB54442D18) #6
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store double %call.i, double* %x, align 8, !tbaa !8
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%2 = getelementptr inbounds [0 x i8*], [0 x i8*]* %captured_vars_addrs, i64 0, i64 0
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call void @__kmpc_parallel_51(%struct.ident_t* nonnull @1, i32 %1, i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__ to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8*), i8** nonnull %2, i64 0) #3
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call void @__kmpc_target_deinit(%struct.ident_t* nonnull @1, i8 1, i1 true) #3
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br label %common.ret
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}
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declare i32 @__kmpc_target_init(%struct.ident_t*, i8, i1, i1) local_unnamed_addr
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; Function Attrs: alwaysinline mustprogress nofree norecurse nosync nounwind readnone willreturn
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define internal void @__omp_outlined__(i32* noalias nocapture %.global_tid., i32* noalias nocapture %.bound_tid.) #1 {
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; CHECK-LABEL: define {{[^@]+}}@__omp_outlined__
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; CHECK-SAME: (i32* noalias nocapture [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret void
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;
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entry:
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ret void
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}
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; Function Attrs: norecurse nounwind
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define internal void @__omp_outlined___wrapper(i16 zeroext %0, i32 %1) #2 {
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; CHECK-LABEL: define {{[^@]+}}@__omp_outlined___wrapper
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; CHECK-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR2:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
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; CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** nonnull [[GLOBAL_ARGS]]) #[[ATTR3]]
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; CHECK-NEXT: ret void
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;
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entry:
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%global_args = alloca i8**, align 8
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call void @__kmpc_get_shared_variables(i8*** nonnull %global_args) #3
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ret void
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}
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declare void @__kmpc_get_shared_variables(i8***) local_unnamed_addr
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; Function Attrs: nounwind
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declare i32 @__kmpc_global_thread_num(%struct.ident_t*) local_unnamed_addr #3
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; Function Attrs: alwaysinline
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declare void @__kmpc_parallel_51(%struct.ident_t*, i32, i32, i32, i32, i8*, i8*, i8**, i64) local_unnamed_addr #4
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declare void @__kmpc_target_deinit(%struct.ident_t*, i8, i1) local_unnamed_addr
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; Function Attrs: convergent
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declare double @__nv_sin(double) local_unnamed_addr #5
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attributes #0 = { alwaysinline convergent norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { alwaysinline mustprogress nofree norecurse nosync nounwind readnone willreturn "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #2 = { norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #3 = { nounwind }
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attributes #4 = { alwaysinline }
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attributes #5 = { convergent "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #6 = { convergent nounwind "llvm.assume"="ompx_spmd_amenable" }
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!omp_offload.info = !{!0}
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!nvvm.annotations = !{!1}
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!llvm.module.flags = !{!2, !3, !4, !5, !6}
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!llvm.ident = !{!7}
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!0 = !{i32 0, i32 64770, i32 1078211522, !"main", i32 5, i32 0}
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!1 = !{void (double*)* @__omp_offloading_fd02_404433c2_main_l5, !"kernel", i32 1}
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!2 = !{i32 1, !"wchar_size", i32 4}
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!3 = !{i32 7, !"openmp", i32 50}
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!4 = !{i32 7, !"openmp-device", i32 50}
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!5 = !{i32 8, !"PIC Level", i32 2}
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!6 = !{i32 7, !"frame-pointer", i32 2}
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!7 = !{!"clang version 14.0.0"}
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!8 = !{!9, !9, i64 0}
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!9 = !{!"double", !10, i64 0}
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!10 = !{!"omnipotent char", !11, i64 0}
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!11 = !{!"Simple C/C++ TBAA"}
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;.
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; CHECK: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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; CHECK: attributes #[[ATTR1]] = { alwaysinline mustprogress nofree norecurse nosync nounwind readnone willreturn "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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; CHECK: attributes #[[ATTR2]] = { norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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; CHECK: attributes #[[ATTR3]] = { nounwind }
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; CHECK: attributes #[[ATTR4:[0-9]+]] = { alwaysinline }
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; CHECK: attributes #[[ATTR5:[0-9]+]] = { convergent "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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; CHECK: attributes #[[ATTR6:[0-9]+]] = { convergent nounwind }
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; CHECK: attributes #[[ATTR7]] = { convergent nounwind "llvm.assume"="ompx_spmd_amenable" }
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;.
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; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 64770, i32 1078211522, !"main", i32 5, i32 0}
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; CHECK: [[META1:![0-9]+]] = !{void (double*)* @__omp_offloading_fd02_404433c2_main_l5, !"kernel", i32 1}
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; CHECK: [[META2:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
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; CHECK: [[META3:![0-9]+]] = !{i32 7, !"openmp", i32 50}
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; CHECK: [[META4:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
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; CHECK: [[META5:![0-9]+]] = !{i32 8, !"PIC Level", i32 2}
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; CHECK: [[META6:![0-9]+]] = !{i32 7, !"frame-pointer", i32 2}
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; CHECK: [[META7:![0-9]+]] = !{!"clang version 14.0.0"}
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; CHECK: [[TBAA8]] = !{!9, !9, i64 0}
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; CHECK: [[META9:![0-9]+]] = !{!"double", !10, i64 0}
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; CHECK: [[META10:![0-9]+]] = !{!"omnipotent char", !11, i64 0}
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; CHECK: [[META11:![0-9]+]] = !{!"Simple C/C++ TBAA"}
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;.
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