This appears to be a copy+paste typo in the znver1/2 AMD SoG tables, treating the byte shift instructions like bit shifts Older AMD SoG referred to PSLLDQ/PSRLDQ as shuffles, and Agner/instlatx64 both report they are integer shuffles
This appears to be a copy+paste typo in the znver1/2 AMD SoG tables, treating the byte shift instructions like bit shifts Older AMD SoG referred to PSLLDQ/PSRLDQ as shuffles, and Agner/instlatx64 both report they are integer shuffles