shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/lib/Target/VE
History
Simon Moll 91fad1167a [VE] v512|256 f32|64 fneg isel and tests 
fneg instruction isel and tests. We do this also in preparation of fused
negatate-multiple-add fp operations.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D121620
2022-03-16 11:31:26 +01:00
..
AsmParser
Cleanup MCParser headers
2022-02-11 10:39:29 +01:00
Disassembler
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
MCTargetDesc
Fix Wdocumentation missing code snippet warnings
2022-02-19 13:17:10 +00:00
TargetInfo
Fix shlib builds for all lib/Target/*/TargetInfo libs
2021-10-08 15:21:13 -07:00
CMakeLists.txt
[VE] LEGALAVL and staged VVP legalization
2022-02-02 09:11:41 +01:00
LVLGen.cpp
[Target] Use range-based for loops (NFC)
2022-01-23 22:53:15 -08:00
VE.h
[VE] v256i1 broadcast isel and tests
2022-02-15 12:40:51 +01:00
VE.td
[VE] Change default CPU name to "generic"
2021-01-04 20:09:57 +09:00
VEAsmPrinter.cpp
Move TargetRegistry.(h|cpp) from Support to MC
2021-10-08 14:51:48 -07:00
VECallingConv.td
[VE] Correct VMP allocation in calling conv
2020-12-21 22:42:24 +09:00
VECustomDAG.cpp
[VE] v512|256 f32|64 fneg isel and tests
2022-03-16 11:31:26 +01:00
VECustomDAG.h
[VE] v512|256 f32|64 fneg isel and tests
2022-03-16 11:31:26 +01:00
VEFrameLowering.cpp
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
2021-03-30 17:31:39 +01:00
VEFrameLowering.h
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
VEInstrBuilder.h
[VE] Support SJLJ exception related instructions
2021-01-05 20:19:15 +09:00
VEInstrFormats.td
…
VEInstrInfo.cpp
Drop some more global std::maps. NFCI.
2022-03-06 13:28:29 +01:00
VEInstrInfo.h
…
VEInstrInfo.td
[VE] Support more intrinsics
2022-03-14 19:17:15 +09:00
VEInstrIntrinsicVL.gen.td
[VE] Support more intrinsics
2022-03-14 19:17:15 +09:00
VEInstrIntrinsicVL.td
[VE] Support more intrinsics
2022-03-14 19:17:15 +09:00
VEInstrPatternsVec.td
[VE] Split unsupported v512.32 ops
2022-02-22 14:29:41 +01:00
VEInstrVec.td
[VE] Add logical mask intrinsic instructions
2020-12-15 01:34:31 +09:00
VEISelDAGToDAG.cpp
[VE] v256i1 broadcast isel and tests
2022-02-15 12:40:51 +01:00
VEISelLowering.cpp
[VE] strided v256.23 isel and tests
2022-03-15 15:29:19 +01:00
VEISelLowering.h
[VE] v256.32|64 gather|scatter isel and tests
2022-03-14 10:38:56 +01:00
VEMachineFunctionInfo.cpp
…
VEMachineFunctionInfo.h
[Target] Remove redundant member initialization (NFC)
2022-01-06 22:01:44 -08:00
VEMCInstLower.cpp
[Target] Use range-based for loops (NFC)
2022-01-23 22:53:15 -08:00
VERegisterInfo.cpp
[VE] Support atomic exchange instructions
2020-12-15 17:43:11 +09:00
VERegisterInfo.h
…
VERegisterInfo.td
[VE] Fix vmp0 subregister mapping
2022-02-18 13:17:10 +01:00
VESubtarget.cpp
Move TargetRegistry.(h|cpp) from Support to MC
2021-10-08 14:51:48 -07:00
VESubtarget.h
Remove redundant void arguments (NFC)
2022-01-02 10:20:19 -08:00
VETargetMachine.cpp
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
VETargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
VETargetTransformInfo.h
[VE] v256i32|64 reduction isel and tests
2022-03-14 11:10:38 +01:00
VVPInstrInfo.td
[VE] v512|256 f32|64 fneg isel and tests
2022-03-16 11:31:26 +01:00
VVPInstrPatternsVec.td
[VE] v512|256 f32|64 fneg isel and tests
2022-03-16 11:31:26 +01:00
VVPISelLowering.cpp
[VE] v512|256 f32|64 fneg isel and tests
2022-03-16 11:31:26 +01:00
VVPNodes.def
[VE] v512|256 f32|64 fneg isel and tests
2022-03-16 11:31:26 +01:00