85c53c7092
It caused builds to assert with: (StackSize == 0 && "We already have the CFA offset!"), function generateCompactUnwindEncoding, file AArch64AsmBackend.cpp, line 624. when targeting iOS. See comment on the code review for reproducer. > This patch rearranges emission of CFI instructions, so the resulting > DWARF and `.eh_frame` information is precise at every instruction. > > The current state is that the unwind info is emitted only after the > function prologue. This is fine for synchronous (e.g. C++) exceptions, > but the information is generally incorrect when the program counter is > at an instruction in the prologue or the epilogue, for example: > > ``` > stp x29, x30, [sp, #-16]! // 16-byte Folded Spill > mov x29, sp > .cfi_def_cfa w29, 16 > ... > ``` > > after the `stp` is executed the (initial) rule for the CFA still says > the CFA is in the `sp`, even though it's already offset by 16 bytes > > A correct unwind info could look like: > ``` > stp x29, x30, [sp, #-16]! // 16-byte Folded Spill > .cfi_def_cfa_offset 16 > mov x29, sp > .cfi_def_cfa w29, 16 > ... > ``` > > Having this information precise up to an instruction is useful for > sampling profilers that would like to get a stack backtrace. The end > goal (towards this patch is just a step) is to have fully working > `-fasynchronous-unwind-tables`. > > Reviewed By: danielkiss, MaskRay > > Differential Revision: https://reviews.llvm.org/D111411 This reverts commit 32e8b550e5439c7e4aafa73894faffd5f25d0d05.
47 lines
1.3 KiB
LLVM
47 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm64-apple-ios %s -o - | FileCheck %s
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define void @foo() {
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; CHECK-LABEL: foo:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: stp x28, x27, [sp, #-32]! ; 16-byte Folded Spill
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; CHECK-NEXT: stp x29, x30, [sp, #16] ; 16-byte Folded Spill
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; CHECK-NEXT: sub sp, sp, #1, lsl #12 ; =4096
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; CHECK-NEXT: sub sp, sp, #80
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; CHECK-NEXT: .cfi_def_cfa_offset 4208
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; CHECK-NEXT: .cfi_offset w30, -8
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: .cfi_offset w27, -24
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; CHECK-NEXT: .cfi_offset w28, -32
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; CHECK-NEXT: adds x8, sp, #1, lsl #12 ; =4096
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; CHECK-NEXT: cmn x8, #32
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; CHECK-NEXT: b.eq LBB0_2
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; CHECK-NEXT: ; %bb.1: ; %false
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; CHECK-NEXT: bl _baz
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; CHECK-NEXT: b LBB0_3
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; CHECK-NEXT: LBB0_2: ; %true
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; CHECK-NEXT: bl _bar
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; CHECK-NEXT: LBB0_3: ; %common.ret
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; CHECK-NEXT: add sp, sp, #1, lsl #12 ; =4096
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; CHECK-NEXT: add sp, sp, #80
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; CHECK-NEXT: ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
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; CHECK-NEXT: ldp x28, x27, [sp], #32 ; 16-byte Folded Reload
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; CHECK-NEXT: ret
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%var = alloca i32, i32 12
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%var2 = alloca i32, i32 1030
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%tst = icmp eq i32* %var, null
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br i1 %tst, label %true, label %false
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true:
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call void @bar()
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ret void
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false:
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call void @baz()
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ret void
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}
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declare void @bar()
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declare void @baz()
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