39 lines
1.9 KiB
LLVM
39 lines
1.9 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -passes=loop-vectorize -vectorizer-maximize-bandwidth -debug-only=loop-vectorize -disable-output -force-vector-interleave=1 -enable-epilogue-vectorization=false -S < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-REGS-VP
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; RUN: opt -passes=loop-vectorize -vectorizer-maximize-bandwidth -debug-only=loop-vectorize -disable-output -force-target-num-vector-regs=1 -force-vector-interleave=1 -enable-epilogue-vectorization=false -S < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-NOREGS-VP
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-none-unknown-elf"
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define i32 @dotp(ptr %a, ptr %b) #0 {
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; CHECK-REGS-VP-NOT: LV(REG): Not considering vector loop of width vscale x 16 because it uses too many registers
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; CHECK-REGS-VP: LV: Selecting VF: vscale x 8.
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;
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; CHECK-NOREGS-VP: LV(REG): Not considering vector loop of width vscale x 8 because it uses too many registers
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; CHECK-NOREGS-VP: LV(REG): Not considering vector loop of width vscale x 16 because it uses too many registers
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; CHECK-NOREGS-VP: LV: Selecting VF: vscale x 4.
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%accum = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%gep.a = getelementptr i8, ptr %a, i64 %iv
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%load.a = load i8, ptr %gep.a, align 1
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%ext.a = zext i8 %load.a to i32
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%gep.b = getelementptr i8, ptr %b, i64 %iv
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%load.b = load i8, ptr %gep.b, align 1
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%ext.b = zext i8 %load.b to i32
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%mul = mul i32 %ext.b, %ext.a
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%sub = sub i32 0, %mul
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%add = add i32 %accum, %sub
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%iv.next = add i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, 1024
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br i1 %exitcond.not, label %for.exit, label %for.body
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for.exit: ; preds = %for.body
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ret i32 %add
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}
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attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
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