Muhammad Omair Javaid 176d54aa33 Revert "[VectorUtils] Trivially vectorize ldexp, [l]lround (#145545)" ...

This reverts commit 13366759c3b9db9366659d870cc73c938422b020.

This broke various LLVM testsuite buildbots for AArch64 SVE, but the
problem got masked because relevant buildbots were already failing
due to other breakage.

It has broken llvm-test-suite test:
gfortran-regression-compile-regression__vect__pr106253_f.test

https://lab.llvm.org/buildbot/#/builders/4/builds/8164
https://lab.llvm.org/buildbot/#/builders/17/builds/9858
https://lab.llvm.org/buildbot/#/builders/41/builds/8067
https://lab.llvm.org/buildbot/#/builders/143/builds/9607

2025-08-01 01:24:52 +05:00

..

32-bit.ll

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64-bit-vector.ll

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accelerate-vector-functions-inseltpoison.ll

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accelerate-vector-functions.ll

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alternate-vectorization-split-node.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

buildvector-reduce.ll

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buildvector-vectorize.ll

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commute.ll

[SLP] Emit reduction instead of 2 extracts + scalar op, when vectorizing operands (#147583)

2025-07-10 12:50:52 -07:00

div.ll

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ext-trunc.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

external-non-inst-use.ll

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external-use-icmp.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

extract-subvector-long-input.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

extractelements-to-shuffle.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

extracts-from-scalarizable-vector.ll

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fminimumnum.ll

Vectorize: Support fminimumnum and fmaximumnum (#131781)

2025-04-15 08:08:45 +08:00

fmulladd.ll

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fpsat.ll

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fshl.ll

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gather-buildvector-with-minbitwidth-user.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

gather-cost.ll

[SLP] Drop unnecessary '' from around -passes=... arg lists to appease update_test_checks.py when run on DOS. NFC.

2025-07-10 12:18:41 +01:00

gather-load-128.ll

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gather-load-min-required-vf-2.ll

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gather-reduce.ll

[SLP] Avoid -passes=instcombine stages in SLP tests (#146257)

2025-07-02 06:14:41 -04:00

gather-root.ll

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gather-with-minbith-user.ll

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getelementptr2.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

getelementptr.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

horizontal.ll

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insertelement-inseltpoison.ll

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insertelement.ll

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InstructionsState-is-invalid-0.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

invalid_type.ll

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landing_pad.ll

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lit.local.cfg

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load-store-q.ll

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loadi8.ll

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loadorder.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

masked-loads-side-effects-after-vec.ll

[SLP]Cache data for compressed loads before codegen

2025-04-17 08:43:44 -07:00

matmul.ll

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memory-runtime-checks-in-loops.ll

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memory-runtime-checks.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

minbitwidth-cast-node-length.ll

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minimum-sizes.ll

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mismatched-intrinsics.ll

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mul.ll

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multiple_reduction.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

nontemporal.ll

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phi-node-bitwidt-op-not.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

phi-use-order-scalable.ll

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PR38339.ll

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reduce-add-i64.ll

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reduce-fadd.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

reduce-maximumnum-minimumnum.ll

[IVDescriptors] Support reductions with minimumnum/maximumnum. (#137335)

2025-04-28 11:16:36 +01:00

remarks.ll

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reorder-fmuladd-crash.ll

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reordered-loads.ll

[SLP]Use proper order when calculating costs for geps/extracts to correctly identify profitability

2025-04-09 07:43:23 -07:00

reused-scalar-repeated-in-node.ll

Revert "[SLP]Change the insertion point for outside-block-used nodes and prevec phi operand gathers"

2025-05-17 11:06:37 -07:00

scalable-external-user.ll

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scalable-vector.ll

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scalarization-overhead.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

sdiv-pow2.ll

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shuffle-vectors-mask-size.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

slp-abs.ll

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slp-and-reduction.ll

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slp-fma-loss.ll

Revert "[SLP] Emit reduction instead of 2 extracts + scalar op, when vectorizing operands (#147583)"

2025-07-10 14:55:22 +01:00

slp-frem.ll

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slp-or-reduction.ll

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slp-xor-reduction.ll

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spillcost-di.ll

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spillcost-order.ll

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splat-loads.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

store-ptr.ll

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transpose-inseltpoison.ll

[SLP] Avoid -passes=instcombine stages in SLP tests (#146257)

2025-07-02 06:14:41 -04:00

transpose.ll

[SLP] Avoid -passes=instcombine stages in SLP tests (#146257)

2025-07-02 06:14:41 -04:00

trunc-insertion.ll

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tsc-s116.ll

[SLP]Reduce number of alternate instruction, where possible

2025-03-12 08:18:51 -07:00

tsc-s352.ll

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unreachable-blocks-with-phis.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

unsigned-after-sext-node.ll

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uselistorder.ll

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user-node-not-in-bitwidths.ll

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vec3-base.ll

[SLP] Make getSameOpcode support interchangeable instructions. (#135797)

2025-04-16 00:08:59 +08:00

vec3-calls.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

vec3-reorder-reshuffle.ll

[SLP]Support revectorization of the previously vectorized scalars

2025-04-01 14:30:06 -04:00

vec15-base.ll

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vecreduceadd.ll

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vector-getelementptr.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

vectorizable-selects-min-max.ll

[SLP] Drop unnecessary '' from around -passes=... arg lists to appease update_test_checks.py when run on DOS. NFC.

2025-07-10 12:18:41 +01:00

vectorizable-selects-uniform-cmps.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)

2025-07-15 15:19:27 +01:00

vectorize-free-extracts-inserts.ll

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widen.ll

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