26fc3aa983
Compiling this:
`int main() {`
` #pragma omp metadirective when(use r= {condition(0)}`
`: parallel for)`
`for (int i=0; i<10; i++)`
;
}`
is generating an error:
`error: expected expression`
The compiler is interpreting this as if it's compiling a `#pragma omp
metadirective` with no `otherwise` clause.
In the OMP5.2 specs chapter 7.4 it's mentioned that:
`If no otherwise clause is specified the effect is as if one was
specified without an associated directive variant.`
This patch fixes the issue.
126 lines
4.5 KiB
C++
126 lines
4.5 KiB
C++
// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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void func1() {
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for) otherwise()
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for (int i = 0; i < 100; i++)
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;
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for)
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for (int i = 0; i < 100; i++)
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;
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for) \
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when(implementation = {extension(match_none)} \
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: parallel) default(parallel for)
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for (int i = 0; i < 100; i++)
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;
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}
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// CHECK-LABEL: define dso_local void @_Z5func1v()
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// CHECK: entry
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store i32 0, ptr [[I]], align 4
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// CHECK-NEXT: br label %[[FOR_COND:.*]]
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// CHECK: [[FOR_COND]]:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
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// CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
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// CHECK: [[FOR_BODY]]:
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// CHECK-NEXT: br label %[[FOR_INC:.*]]
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// CHECK: [[FOR_INC]]:
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
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// CHECK-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
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// CHECK: [[FOR_END]]:
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// CHECK-NEXT: store i32 0, ptr [[I1]], align 4
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// CHECK-NEXT: br label %[[FOR_COND2:.*]]
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// CHECK: [[FOR_COND2]]:
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// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I1]], align 4
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// CHECK-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100
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// CHECK-NEXT: br i1 [[CMP3]], label %[[FOR_BODY4:.*]], label %[[FOR_END7:.*]]
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// CHECK: [[FOR_BODY4]]:
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// CHECK-NEXT: br label %[[FOR_INC5:.*]]
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// CHECK: [[FOR_INC5]]:
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// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[I1]], align 4
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// CHECK-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1
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// CHECK-NEXT: store i32 [[INC6]], ptr [[I1]], align 4
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// CHECK-NEXT: br label %[[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]]
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// CHECK: [[FOR_END7]]:
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// CHECK: ret void
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void func2() {
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#pragma omp metadirective when(user = {condition(1)} \
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: parallel for) otherwise()
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for (int i = 0; i < 100; i++)
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;
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#pragma omp metadirective when(user = {condition(1)} \
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: parallel for)
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for (int i = 0; i < 100; i++)
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;
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}
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// CHECK-LABEL: define dso_local void @_Z5func2v()
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// CHECK: entry
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// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @_Z5func2v.omp_outlined)
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// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @_Z5func2v.omp_outlined.1)
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// CHECK-NEXT: ret void
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void func3() {
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for) \
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when(implementation = {extension(match_none)} \
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: parallel) default(parallel for)
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for (int i = 0; i < 100; i++)
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;
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}
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// CHECK-LABEL: define dso_local void @_Z5func3v()
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// CHECK: entry
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// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 0, ptr @_Z5func3v.omp_outlined)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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// CHECK-LABEL: define internal void @_Z5func3v.omp_outlined
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// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]],
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// CHECK-SAME: ptr noalias noundef [[DOTBOUND_TID_:%.*]])
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// CHECK-NEXT: entry
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// CHECK-NEXT: [[GLOB_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[BOUND_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[GLOB_TID__ADDR]], align 8
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// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[BOUND_TID__ADDR]], align 8
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// CHECK-NEXT: store i32 0, ptr [[I]], align 4
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// CHECK-NEXT: br label %for.cond
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// CHECK:for.cond:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
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// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
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// CHECK:for.body:
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// CHECK-NEXT: br label [[FOR_INC:%.*]]
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// CHECK:for.inc:
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
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// CHECK-NEXT: br label [[FOR_COND:%.*]]
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// CHECK:for.end:
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// CHECK-NEXT: ret void
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// CHECK-NEXT:}
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#endif
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