351a0d8a90
This patch updates the PC-Relative load and store patterns to utilize the refactored load/store implementation introduced in D93370. PC-Relative implementation has been added to PPCISelLowering.cpp, and also the patterns in PPCInstrPrefix.td have been updated and no longer require AddedComplexity. All existing test cases pass with this update. Differential Revision: https://reviews.llvm.org/D95116
111 lines
4.1 KiB
LLVM
111 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10-BE
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; Function Attrs: norecurse nounwind readonly
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define dso_local <2 x double> @test1(<2 x float>* nocapture readonly %Ptr) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lfd f0, 0(r3)
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; CHECK-NEXT: xxmrghw vs0, vs0, vs0
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; CHECK-NEXT: xvcvspdp v2, vs0
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x float>, <2 x float>* %Ptr, align 8
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%1 = fpext <2 x float> %0 to <2 x double>
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ret <2 x double> %1
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}
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; Function Attrs: norecurse nounwind readonly
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define dso_local <2 x double> @test2(<2 x float>* nocapture readonly %a, <2 x float>* nocapture readonly %b) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lfd f0, 0(r4)
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; CHECK-NEXT: lfd f1, 0(r3)
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; CHECK-NEXT: xvsubsp vs0, vs1, vs0
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; CHECK-NEXT: xxmrghw vs0, vs0, vs0
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; CHECK-NEXT: xvcvspdp v2, vs0
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x float>, <2 x float>* %a, align 8
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%1 = load <2 x float>, <2 x float>* %b, align 8
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%sub = fsub <2 x float> %0, %1
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%2 = fpext <2 x float> %sub to <2 x double>
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ret <2 x double> %2
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}
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; Function Attrs: norecurse nounwind readonly
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; Function Attrs: norecurse nounwind readonly
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define dso_local <2 x double> @test3(<2 x float>* nocapture readonly %a, <2 x float>* nocapture readonly %b) {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lfd f0, 0(r4)
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; CHECK-NEXT: lfd f1, 0(r3)
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; CHECK-NEXT: xvaddsp vs0, vs1, vs0
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; CHECK-NEXT: xxmrghw vs0, vs0, vs0
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; CHECK-NEXT: xvcvspdp v2, vs0
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x float>, <2 x float>* %a, align 8
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%1 = load <2 x float>, <2 x float>* %b, align 8
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%sub = fadd <2 x float> %0, %1
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%2 = fpext <2 x float> %sub to <2 x double>
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ret <2 x double> %2
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}
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; Function Attrs: norecurse nounwind readonly
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; Function Attrs: norecurse nounwind readonly
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define dso_local <2 x double> @test4(<2 x float>* nocapture readonly %a, <2 x float>* nocapture readonly %b) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lfd f0, 0(r4)
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; CHECK-NEXT: lfd f1, 0(r3)
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; CHECK-NEXT: xvmulsp vs0, vs1, vs0
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; CHECK-NEXT: xxmrghw vs0, vs0, vs0
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; CHECK-NEXT: xvcvspdp v2, vs0
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; CHECK-NEXT: blr
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entry:
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%0 = load <2 x float>, <2 x float>* %a, align 8
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%1 = load <2 x float>, <2 x float>* %b, align 8
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%sub = fmul <2 x float> %0, %1
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%2 = fpext <2 x float> %sub to <2 x double>
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ret <2 x double> %2
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}
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@G = dso_local local_unnamed_addr global <2 x float> <float 3.000000e+00, float 0x3FF3333340000000>, align 8
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; Function Attrs: mustprogress nofree norecurse nosync nounwind readonly uwtable willreturn
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define dso_local <2 x double> @test5(<2 x double> %a) {
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; CHECK-P10-LABEL: test5:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: plfd f0, G@PCREL(0), 1
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; CHECK-P10-NEXT: xxmrghw vs0, vs0, vs0
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; CHECK-P10-NEXT: xvcvspdp vs0, vs0
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; CHECK-P10-NEXT: xvadddp v2, vs0, v2
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; CHECK-P10-NEXT: blr
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;
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; CHECK-P10-BE-LABEL: test5:
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; CHECK-P10-BE: # %bb.0: # %entry
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; CHECK-P10-BE-NEXT: addis r3, r2, G@toc@ha
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; CHECK-P10-BE-NEXT: lfd f0, G@toc@l(r3)
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; CHECK-P10-BE-NEXT: xxmrghw vs0, vs0, vs0
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; CHECK-P10-BE-NEXT: xvcvspdp vs0, vs0
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; CHECK-P10-BE-NEXT: xvadddp v2, vs0, v2
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; CHECK-P10-BE-NEXT: blr
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entry:
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%0 = load <2 x float>, <2 x float>* @G, align 8
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%1 = fpext <2 x float> %0 to <2 x double>
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%add = fadd <2 x double> %1, %a
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ret <2 x double> %add
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}
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