llvm-project/llvm/test/CodeGen/RISCV/bfloat-convert-half.ll
Ying Wang 4bac9d4911
[RISCV] Add isel for bitcasting between bfloat and half types (#158828)
There is no RISCV isel for bitcast between f16 and bf16 which will
trigger "cannot select" fatal error.

Co-authored-by: Ying Wang <wy446777@alibaba-inc.com>
2025-09-17 12:10:47 -07:00

30 lines
874 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zfhmin,+zfbfmin \
; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=RV32
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zfhmin,+zfbfmin \
; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=RV64
define bfloat @fcvt_bf16_h(half %a) nounwind {
; RV32-LABEL: fcvt_bf16_h:
; RV32: # %bb.0:
; RV32-NEXT: ret
;
; RV64-LABEL: fcvt_bf16_h:
; RV64: # %bb.0:
; RV64-NEXT: ret
%r = bitcast half %a to bfloat
ret bfloat %r
}
define half @test_h_bf16(bfloat %a) nounwind {
; RV32-LABEL: test_h_bf16:
; RV32: # %bb.0:
; RV32-NEXT: ret
;
; RV64-LABEL: test_h_bf16:
; RV64: # %bb.0:
; RV64-NEXT: ret
%r = bitcast bfloat %a to half
ret half %r
}