50b9ca4dda
After https://github.com/llvm/llvm-project/pull/153643, there may be a BranchOnCond with constant condition in the entry block. Simplify those in removeBranchOnConst. This removes a number of redundant conditional branch from entry blocks. In some cases, it may also make the original scalar loop unreachable, because we know it will never execute. In that case, we need to remove the loop from LoopInfo, because all unreachable blocks may dominate each other, making LoopInfo invalid. In those cases, we can also completely remove the loop, for which I'll share a follow-up patch. Depends on https://github.com/llvm/llvm-project/pull/153643. PR: https://github.com/llvm/llvm-project/pull/154510
2404 lines
152 KiB
LLVM
2404 lines
152 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -S | FileCheck %s
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; RUN: opt < %s -passes=loop-vectorize -scalable-vectorization=off -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefix=FIXED
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; RUN: opt < %s -passes=loop-vectorize -scalable-vectorization=on -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefix=SCALABLE
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define void @load_store_factor2_i32(ptr %p) {
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; CHECK-LABEL: @load_store_factor2_i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
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; CHECK-NEXT: [[TMP14:%.*]] = shl i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP14]]
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; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
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; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i32> @llvm.vp.load.nxv8i32.p0(ptr align 4 [[TMP15]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
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; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> [[WIDE_MASKED_VEC]])
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; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 0
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; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 1
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; CHECK-NEXT: [[TMP10:%.*]] = add <vscale x 4 x i32> [[TMP8]], splat (i32 1)
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; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 4 x i32> [[TMP9]], splat (i32 2)
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; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 2
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; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 8 x i32> @llvm.vector.interleave2.nxv8i32(<vscale x 4 x i32> [[TMP10]], <vscale x 4 x i32> [[TMP11]])
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; CHECK-NEXT: call void @llvm.vp.store.nxv8i32.p0(<vscale x 8 x i32> [[INTERLEAVED_VEC]], ptr align 4 [[TMP15]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
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; CHECK-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
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; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
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; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
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; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
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; CHECK-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
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; CHECK-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
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; CHECK-NEXT: [[Y0:%.*]] = add i32 [[X0]], 1
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; CHECK-NEXT: store i32 [[Y0]], ptr [[Q0]], align 4
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; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
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; CHECK-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
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; CHECK-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
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; CHECK-NEXT: [[Y1:%.*]] = add i32 [[X1]], 2
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; CHECK-NEXT: store i32 [[Y1]], ptr [[Q1]], align 4
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; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
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; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
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; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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; FIXED-LABEL: @load_store_factor2_i32(
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; FIXED-NEXT: entry:
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; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
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; FIXED: vector.ph:
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; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
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; FIXED: vector.body:
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; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; FIXED-NEXT: [[TMP0:%.*]] = shl i64 [[INDEX]], 1
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; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP0]]
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; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <16 x i32>, ptr [[TMP1]], align 4
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; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i32> [[WIDE_VEC]], <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
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; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <16 x i32> [[WIDE_VEC]], <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
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; FIXED-NEXT: [[TMP2:%.*]] = add <8 x i32> [[STRIDED_VEC]], splat (i32 1)
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; FIXED-NEXT: [[TMP3:%.*]] = add <8 x i32> [[STRIDED_VEC1]], splat (i32 2)
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; FIXED-NEXT: [[TMP4:%.*]] = shufflevector <8 x i32> [[TMP2]], <8 x i32> [[TMP3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <16 x i32> [[TMP4]], <16 x i32> poison, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
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; FIXED-NEXT: store <16 x i32> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 4
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; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
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; FIXED-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
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; FIXED-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; FIXED: middle.block:
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; FIXED-NEXT: br label [[EXIT:%.*]]
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; FIXED: scalar.ph:
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; FIXED-NEXT: br label [[LOOP:%.*]]
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; FIXED: loop:
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; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
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; FIXED-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
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; FIXED-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
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; FIXED-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
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; FIXED-NEXT: [[Y0:%.*]] = add i32 [[X0]], 1
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; FIXED-NEXT: store i32 [[Y0]], ptr [[Q0]], align 4
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; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
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; FIXED-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
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; FIXED-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
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; FIXED-NEXT: [[Y1:%.*]] = add i32 [[X1]], 2
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; FIXED-NEXT: store i32 [[Y1]], ptr [[Q1]], align 4
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; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
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; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
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; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
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; FIXED: exit:
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; FIXED-NEXT: ret void
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;
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; SCALABLE-LABEL: @load_store_factor2_i32(
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; SCALABLE-NEXT: entry:
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; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
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; SCALABLE: vector.ph:
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; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
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; SCALABLE: vector.body:
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; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
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; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
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; SCALABLE-NEXT: [[TMP14:%.*]] = shl i64 [[INDEX]], 1
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; SCALABLE-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP14]]
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; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
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; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i32> @llvm.vp.load.nxv8i32.p0(ptr align 4 [[TMP15]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
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; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> [[WIDE_MASKED_VEC]])
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; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 0
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; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 1
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; SCALABLE-NEXT: [[TMP10:%.*]] = add <vscale x 4 x i32> [[TMP8]], splat (i32 1)
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; SCALABLE-NEXT: [[TMP11:%.*]] = add <vscale x 4 x i32> [[TMP9]], splat (i32 2)
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; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 2
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; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 8 x i32> @llvm.vector.interleave2.nxv8i32(<vscale x 4 x i32> [[TMP10]], <vscale x 4 x i32> [[TMP11]])
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; SCALABLE-NEXT: call void @llvm.vp.store.nxv8i32.p0(<vscale x 8 x i32> [[INTERLEAVED_VEC]], ptr align 4 [[TMP15]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
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; SCALABLE-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
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; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
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; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
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; SCALABLE-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
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; SCALABLE-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; SCALABLE: middle.block:
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; SCALABLE-NEXT: br label [[EXIT:%.*]]
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; SCALABLE: scalar.ph:
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; SCALABLE-NEXT: br label [[LOOP:%.*]]
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; SCALABLE: loop:
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; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
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; SCALABLE-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
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; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
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; SCALABLE-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
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; SCALABLE-NEXT: [[Y0:%.*]] = add i32 [[X0]], 1
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; SCALABLE-NEXT: store i32 [[Y0]], ptr [[Q0]], align 4
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; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
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; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
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; SCALABLE-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
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; SCALABLE-NEXT: [[Y1:%.*]] = add i32 [[X1]], 2
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; SCALABLE-NEXT: store i32 [[Y1]], ptr [[Q1]], align 4
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; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
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; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
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; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
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; SCALABLE: exit:
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; SCALABLE-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%i = phi i64 [0, %entry], [%nexti, %loop]
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%offset0 = shl i64 %i, 1
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%q0 = getelementptr i32, ptr %p, i64 %offset0
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%x0 = load i32, ptr %q0
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%y0 = add i32 %x0, 1
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store i32 %y0, ptr %q0
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%offset1 = add i64 %offset0, 1
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%q1 = getelementptr i32, ptr %p, i64 %offset1
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%x1 = load i32, ptr %q1
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%y1 = add i32 %x1, 2
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store i32 %y1, ptr %q1
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%nexti = add i64 %i, 1
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%done = icmp eq i64 %nexti, 1024
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br i1 %done, label %exit, label %loop
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exit:
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ret void
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}
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define void @load_store_factor2_i64(ptr %p) {
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; CHECK-LABEL: @load_store_factor2_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
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; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP8]]
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; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
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; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 4 x i64> @llvm.vp.load.nxv4i64.p0(ptr align 8 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
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; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64> [[WIDE_MASKED_VEC]])
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; CHECK-NEXT: [[TMP20:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
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; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
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; CHECK-NEXT: [[TMP13:%.*]] = add <vscale x 2 x i64> [[TMP20]], splat (i64 1)
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; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 2 x i64> [[TMP9]], splat (i64 2)
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; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 2
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; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 4 x i64> @llvm.vector.interleave2.nxv4i64(<vscale x 2 x i64> [[TMP13]], <vscale x 2 x i64> [[TMP11]])
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; CHECK-NEXT: call void @llvm.vp.store.nxv4i64.p0(<vscale x 4 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
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; CHECK-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
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; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
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; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
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; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
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; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
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; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
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; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
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; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
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; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
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; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
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; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
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; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
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; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
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; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
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; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
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; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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; FIXED-LABEL: @load_store_factor2_i64(
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; FIXED-NEXT: entry:
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; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
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; FIXED: vector.ph:
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; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
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; FIXED: vector.body:
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; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; FIXED-NEXT: [[TMP0:%.*]] = shl i64 [[INDEX]], 1
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; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
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; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <8 x i64>, ptr [[TMP1]], align 8
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; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i64> [[WIDE_VEC]], <8 x i64> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i64> [[WIDE_VEC]], <8 x i64> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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; FIXED-NEXT: [[TMP2:%.*]] = add <4 x i64> [[STRIDED_VEC]], splat (i64 1)
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; FIXED-NEXT: [[TMP3:%.*]] = add <4 x i64> [[STRIDED_VEC1]], splat (i64 2)
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; FIXED-NEXT: [[TMP4:%.*]] = shufflevector <4 x i64> [[TMP2]], <4 x i64> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i64> [[TMP4]], <8 x i64> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
|
|
; FIXED-NEXT: store <8 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
|
; FIXED-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor2_i64(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = shl i64 [[INDEX]], 1
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP8]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 4 x i64> @llvm.vp.load.nxv4i64.p0(ptr align 8 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP20:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = add <vscale x 2 x i64> [[TMP20]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = add <vscale x 2 x i64> [[TMP9]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 2
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 4 x i64> @llvm.vector.interleave2.nxv4i64(<vscale x 2 x i64> [[TMP13]], <vscale x 2 x i64> [[TMP11]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv4i64.p0(<vscale x 4 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = shl i64 %i, 1
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor3_i32(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor3_i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
|
|
; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[INDEX]], 3
|
|
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP16]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 12 x i32> @llvm.vp.load.nxv12i32.p0(ptr align 4 [[TMP17]], <vscale x 12 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave3.nxv12i32(<vscale x 12 x i32> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 4 x i32> [[TMP8]], splat (i32 1)
|
|
; CHECK-NEXT: [[TMP12:%.*]] = add <vscale x 4 x i32> [[TMP9]], splat (i32 2)
|
|
; CHECK-NEXT: [[TMP13:%.*]] = add <vscale x 4 x i32> [[TMP10]], splat (i32 3)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 12 x i32> @llvm.vector.interleave3.nxv12i32(<vscale x 4 x i32> [[TMP11]], <vscale x 4 x i32> [[TMP12]], <vscale x 4 x i32> [[TMP13]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv12i32.p0(<vscale x 12 x i32> [[INTERLEAVED_VEC]], ptr align 4 [[TMP17]], <vscale x 12 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP19:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP19]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]
|
|
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 3
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i32 [[X0]], 1
|
|
; CHECK-NEXT: store i32 [[Y0]], ptr [[Q0]], align 4
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i32 [[X1]], 2
|
|
; CHECK-NEXT: store i32 [[Y1]], ptr [[Q1]], align 4
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i32, ptr [[Q2]], align 4
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i32 [[X2]], 3
|
|
; CHECK-NEXT: store i32 [[Y2]], ptr [[Q2]], align 4
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor3_i32(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = mul i64 [[INDEX]], 3
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <24 x i32>, ptr [[TMP1]], align 4
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <24 x i32> [[WIDE_VEC]], <24 x i32> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <24 x i32> [[WIDE_VEC]], <24 x i32> poison, <8 x i32> <i32 1, i32 4, i32 7, i32 10, i32 13, i32 16, i32 19, i32 22>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <24 x i32> [[WIDE_VEC]], <24 x i32> poison, <8 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <8 x i32> [[STRIDED_VEC]], splat (i32 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <8 x i32> [[STRIDED_VEC1]], splat (i32 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <8 x i32> [[STRIDED_VEC2]], splat (i32 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[TMP2]], <8 x i32> [[TMP3]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
; FIXED-NEXT: [[TMP6:%.*]] = shufflevector <8 x i32> [[TMP4]], <8 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
|
; FIXED-NEXT: [[TMP7:%.*]] = shufflevector <16 x i32> [[TMP5]], <16 x i32> [[TMP6]], <24 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <24 x i32> [[TMP7]], <24 x i32> poison, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>
|
|
; FIXED-NEXT: store <24 x i32> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 4
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
|
|
; FIXED-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 3
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i32 [[X0]], 1
|
|
; FIXED-NEXT: store i32 [[Y0]], ptr [[Q0]], align 4
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i32 [[X1]], 2
|
|
; FIXED-NEXT: store i32 [[Y1]], ptr [[Q1]], align 4
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i32, ptr [[Q2]], align 4
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i32 [[X2]], 3
|
|
; FIXED-NEXT: store i32 [[Y2]], ptr [[Q2]], align 4
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor3_i32(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = mul i64 [[INDEX]], 3
|
|
; SCALABLE-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP16]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 12 x i32> @llvm.vp.load.nxv12i32.p0(ptr align 4 [[TMP17]], <vscale x 12 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave3.nxv12i32(<vscale x 12 x i32> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = add <vscale x 4 x i32> [[TMP8]], splat (i32 1)
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = add <vscale x 4 x i32> [[TMP9]], splat (i32 2)
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = add <vscale x 4 x i32> [[TMP10]], splat (i32 3)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 12 x i32> @llvm.vector.interleave3.nxv12i32(<vscale x 4 x i32> [[TMP11]], <vscale x 4 x i32> [[TMP12]], <vscale x 4 x i32> [[TMP13]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv12i32.p0(<vscale x 12 x i32> [[INTERLEAVED_VEC]], ptr align 4 [[TMP17]], <vscale x 12 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP19:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP19]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 3
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i32 [[X0]], 1
|
|
; SCALABLE-NEXT: store i32 [[Y0]], ptr [[Q0]], align 4
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i32 [[X1]], 2
|
|
; SCALABLE-NEXT: store i32 [[Y1]], ptr [[Q1]], align 4
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i32, ptr [[Q2]], align 4
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i32 [[X2]], 3
|
|
; SCALABLE-NEXT: store i32 [[Y2]], ptr [[Q2]], align 4
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = mul i64 %i, 3
|
|
%q0 = getelementptr i32, ptr %p, i64 %offset0
|
|
%x0 = load i32, ptr %q0
|
|
%y0 = add i32 %x0, 1
|
|
store i32 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i32, ptr %p, i64 %offset1
|
|
%x1 = load i32, ptr %q1
|
|
%y1 = add i32 %x1, 2
|
|
store i32 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i32, ptr %p, i64 %offset2
|
|
%x2 = load i32, ptr %q2
|
|
%y2 = add i32 %x2, 3
|
|
store i32 %y2, ptr %q2
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor3_i64(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor3_i64(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; CHECK-NEXT: [[TMP8:%.*]] = mul i64 [[INDEX]], 3
|
|
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP8]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vp.load.nxv6i64.p0(ptr align 8 [[TMP14]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave3.nxv6i64(<vscale x 6 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP23:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP25:%.*]] = add <vscale x 2 x i64> [[TMP23]], splat (i64 1)
|
|
; CHECK-NEXT: [[TMP12:%.*]] = add <vscale x 2 x i64> [[TMP9]], splat (i64 2)
|
|
; CHECK-NEXT: [[TMP13:%.*]] = add <vscale x 2 x i64> [[TMP10]], splat (i64 3)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vector.interleave3.nxv6i64(<vscale x 2 x i64> [[TMP25]], <vscale x 2 x i64> [[TMP12]], <vscale x 2 x i64> [[TMP13]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv6i64.p0(<vscale x 6 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP14]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP19:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP19]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]
|
|
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 3
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; CHECK-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor3_i64(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = mul i64 [[INDEX]], 3
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <12 x i64>, ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <4 x i32> <i32 1, i32 4, i32 7, i32 10>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <4 x i32> <i32 2, i32 5, i32 8, i32 11>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <4 x i64> [[STRIDED_VEC]], splat (i64 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <4 x i64> [[STRIDED_VEC1]], splat (i64 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <4 x i64> [[STRIDED_VEC2]], splat (i64 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = shufflevector <4 x i64> [[TMP2]], <4 x i64> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP6:%.*]] = shufflevector <4 x i64> [[TMP4]], <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
|
|
; FIXED-NEXT: [[TMP7:%.*]] = shufflevector <8 x i64> [[TMP5]], <8 x i64> [[TMP6]], <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <12 x i64> [[TMP7]], <12 x i64> poison, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>
|
|
; FIXED-NEXT: store <12 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
|
; FIXED-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 3
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; FIXED-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor3_i64(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = mul i64 [[INDEX]], 3
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP8]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vp.load.nxv6i64.p0(ptr align 8 [[TMP14]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave3.nxv6i64(<vscale x 6 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP23:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP25:%.*]] = add <vscale x 2 x i64> [[TMP23]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = add <vscale x 2 x i64> [[TMP9]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = add <vscale x 2 x i64> [[TMP10]], splat (i64 3)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 3
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vector.interleave3.nxv6i64(<vscale x 2 x i64> [[TMP25]], <vscale x 2 x i64> [[TMP12]], <vscale x 2 x i64> [[TMP13]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv6i64.p0(<vscale x 6 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP14]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP19:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP19]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP19]]
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 3
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; SCALABLE-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = mul i64 %i, 3
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i64, ptr %p, i64 %offset2
|
|
%x2 = load i64, ptr %q2
|
|
%y2 = add i64 %x2, 3
|
|
store i64 %y2, ptr %q2
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor4(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor4(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; CHECK-NEXT: [[TMP8:%.*]] = mul i64 [[INDEX]], 4
|
|
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP8]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 4
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0(ptr align 8 [[TMP9]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave4.nxv8i64(<vscale x 8 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP24:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 3
|
|
; CHECK-NEXT: [[TMP26:%.*]] = add <vscale x 2 x i64> [[TMP24]], splat (i64 1)
|
|
; CHECK-NEXT: [[TMP15:%.*]] = add <vscale x 2 x i64> [[TMP11]], splat (i64 2)
|
|
; CHECK-NEXT: [[TMP16:%.*]] = add <vscale x 2 x i64> [[TMP12]], splat (i64 3)
|
|
; CHECK-NEXT: [[TMP17:%.*]] = add <vscale x 2 x i64> [[TMP13]], splat (i64 4)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 4
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vector.interleave4.nxv8i64(<vscale x 2 x i64> [[TMP26]], <vscale x 2 x i64> [[TMP15]], <vscale x 2 x i64> [[TMP16]], <vscale x 2 x i64> [[TMP17]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv8i64.p0(<vscale x 8 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP9]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP22:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP22]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP22]]
|
|
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 4
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; CHECK-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; CHECK-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; CHECK-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor4(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = mul i64 [[INDEX]], 4
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <16 x i64>, ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <4 x i64> [[STRIDED_VEC]], splat (i64 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <4 x i64> [[STRIDED_VEC1]], splat (i64 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <4 x i64> [[STRIDED_VEC2]], splat (i64 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = add <4 x i64> [[STRIDED_VEC3]], splat (i64 4)
|
|
; FIXED-NEXT: [[TMP6:%.*]] = shufflevector <4 x i64> [[TMP2]], <4 x i64> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP7:%.*]] = shufflevector <4 x i64> [[TMP4]], <4 x i64> [[TMP5]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP8:%.*]] = shufflevector <8 x i64> [[TMP6]], <8 x i64> [[TMP7]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <16 x i64> [[TMP8]], <16 x i64> poison, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 1, i32 5, i32 9, i32 13, i32 2, i32 6, i32 10, i32 14, i32 3, i32 7, i32 11, i32 15>
|
|
; FIXED-NEXT: store <16 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
|
; FIXED-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 4
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; FIXED-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; FIXED-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; FIXED-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; FIXED-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor4(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = mul i64 [[INDEX]], 4
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP8]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 4
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0(ptr align 8 [[TMP9]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave4.nxv8i64(<vscale x 8 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP24:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 3
|
|
; SCALABLE-NEXT: [[TMP26:%.*]] = add <vscale x 2 x i64> [[TMP24]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = add <vscale x 2 x i64> [[TMP11]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = add <vscale x 2 x i64> [[TMP12]], splat (i64 3)
|
|
; SCALABLE-NEXT: [[TMP17:%.*]] = add <vscale x 2 x i64> [[TMP13]], splat (i64 4)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 4
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vector.interleave4.nxv8i64(<vscale x 2 x i64> [[TMP26]], <vscale x 2 x i64> [[TMP15]], <vscale x 2 x i64> [[TMP16]], <vscale x 2 x i64> [[TMP17]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv8i64.p0(<vscale x 8 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP9]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP22:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP22]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP22]]
|
|
; SCALABLE-NEXT: [[TMP18:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 4
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; SCALABLE-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; SCALABLE-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; SCALABLE-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; SCALABLE-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = mul i64 %i, 4
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i64, ptr %p, i64 %offset2
|
|
%x2 = load i64, ptr %q2
|
|
%y2 = add i64 %x2, 3
|
|
store i64 %y2, ptr %q2
|
|
|
|
%offset3 = add i64 %offset2, 1
|
|
%q3 = getelementptr i64, ptr %p, i64 %offset3
|
|
%x3 = load i64, ptr %q3
|
|
%y3 = add i64 %x3, 4
|
|
store i64 %y3, ptr %q3
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor5(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor5(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[INDEX]], 5
|
|
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 5
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 5 x i64> @llvm.vp.load.nxv5i64.p0(ptr align 8 [[TMP19]], <vscale x 5 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave5.nxv5i64(<vscale x 5 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; CHECK-NEXT: [[TMP13:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; CHECK-NEXT: [[TMP14:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; CHECK-NEXT: [[TMP15:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; CHECK-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; CHECK-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 5
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 5 x i64> @llvm.vector.interleave5.nxv5i64(<vscale x 1 x i64> [[TMP13]], <vscale x 1 x i64> [[TMP14]], <vscale x 1 x i64> [[TMP15]], <vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv5i64.p0(<vscale x 5 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP19]], <vscale x 5 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP25:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP25]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP25]]
|
|
; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 5
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; CHECK-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; CHECK-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; CHECK-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; CHECK-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; CHECK-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; CHECK-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor5(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = mul i64 [[INDEX]], 5
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <10 x i64>, ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <10 x i64> [[WIDE_VEC]], <10 x i64> poison, <2 x i32> <i32 0, i32 5>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <10 x i64> [[WIDE_VEC]], <10 x i64> poison, <2 x i32> <i32 1, i32 6>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <10 x i64> [[WIDE_VEC]], <10 x i64> poison, <2 x i32> <i32 2, i32 7>
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <10 x i64> [[WIDE_VEC]], <10 x i64> poison, <2 x i32> <i32 3, i32 8>
|
|
; FIXED-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <10 x i64> [[WIDE_VEC]], <10 x i64> poison, <2 x i32> <i32 4, i32 9>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <2 x i64> [[STRIDED_VEC]], splat (i64 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <2 x i64> [[STRIDED_VEC1]], splat (i64 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <2 x i64> [[STRIDED_VEC2]], splat (i64 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = add <2 x i64> [[STRIDED_VEC3]], splat (i64 4)
|
|
; FIXED-NEXT: [[TMP6:%.*]] = add <2 x i64> [[STRIDED_VEC4]], splat (i64 5)
|
|
; FIXED-NEXT: [[TMP7:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP8:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP9:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP10:%.*]] = shufflevector <2 x i64> [[TMP6]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
|
|
; FIXED-NEXT: [[TMP11:%.*]] = shufflevector <8 x i64> [[TMP9]], <8 x i64> [[TMP10]], <10 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <10 x i64> [[TMP11]], <10 x i64> poison, <10 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 1, i32 3, i32 5, i32 7, i32 9>
|
|
; FIXED-NEXT: store <10 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
|
|
; FIXED-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 5
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; FIXED-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; FIXED-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; FIXED-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; FIXED-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; FIXED-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; FIXED-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; FIXED-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor5(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; SCALABLE-NEXT: [[TMP6:%.*]] = mul i64 [[INDEX]], 5
|
|
; SCALABLE-NEXT: [[TMP19:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 5
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 5 x i64> @llvm.vp.load.nxv5i64.p0(ptr align 8 [[TMP19]], <vscale x 5 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave5.nxv5i64(<vscale x 5 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; SCALABLE-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 5
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 5 x i64> @llvm.vector.interleave5.nxv5i64(<vscale x 1 x i64> [[TMP13]], <vscale x 1 x i64> [[TMP14]], <vscale x 1 x i64> [[TMP15]], <vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv5i64.p0(<vscale x 5 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP19]], <vscale x 5 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP25:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP25]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP25]]
|
|
; SCALABLE-NEXT: [[TMP20:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 5
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; SCALABLE-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; SCALABLE-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; SCALABLE-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; SCALABLE-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; SCALABLE-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; SCALABLE-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; SCALABLE-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = mul i64 %i, 5
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i64, ptr %p, i64 %offset2
|
|
%x2 = load i64, ptr %q2
|
|
%y2 = add i64 %x2, 3
|
|
store i64 %y2, ptr %q2
|
|
|
|
%offset3 = add i64 %offset2, 1
|
|
%q3 = getelementptr i64, ptr %p, i64 %offset3
|
|
%x3 = load i64, ptr %q3
|
|
%y3 = add i64 %x3, 4
|
|
store i64 %y3, ptr %q3
|
|
|
|
%offset4 = add i64 %offset3, 1
|
|
%q4 = getelementptr i64, ptr %p, i64 %offset4
|
|
%x4 = load i64, ptr %q4
|
|
%y4 = add i64 %x4, 5
|
|
store i64 %y4, ptr %q4
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor6(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor6(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[INDEX]], 6
|
|
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 6
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vp.load.nxv6i64.p0(ptr align 8 [[TMP21]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave6.nxv6i64(<vscale x 6 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 5
|
|
; CHECK-NEXT: [[TMP14:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; CHECK-NEXT: [[TMP15:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; CHECK-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; CHECK-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; CHECK-NEXT: [[TMP18:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; CHECK-NEXT: [[TMP19:%.*]] = add <vscale x 1 x i64> [[TMP13]], splat (i64 6)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 6
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vector.interleave6.nxv6i64(<vscale x 1 x i64> [[TMP14]], <vscale x 1 x i64> [[TMP15]], <vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]], <vscale x 1 x i64> [[TMP18]], <vscale x 1 x i64> [[TMP19]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv6i64.p0(<vscale x 6 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP21]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP28:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP28]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP28]]
|
|
; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 6
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; CHECK-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; CHECK-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; CHECK-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; CHECK-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; CHECK-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; CHECK-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; CHECK-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; CHECK-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; CHECK-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; CHECK-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor6(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = mul i64 [[INDEX]], 6
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <12 x i64>, ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <2 x i32> <i32 0, i32 6>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <2 x i32> <i32 1, i32 7>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <2 x i32> <i32 2, i32 8>
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <2 x i32> <i32 3, i32 9>
|
|
; FIXED-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <2 x i32> <i32 4, i32 10>
|
|
; FIXED-NEXT: [[STRIDED_VEC5:%.*]] = shufflevector <12 x i64> [[WIDE_VEC]], <12 x i64> poison, <2 x i32> <i32 5, i32 11>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <2 x i64> [[STRIDED_VEC]], splat (i64 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <2 x i64> [[STRIDED_VEC1]], splat (i64 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <2 x i64> [[STRIDED_VEC2]], splat (i64 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = add <2 x i64> [[STRIDED_VEC3]], splat (i64 4)
|
|
; FIXED-NEXT: [[TMP6:%.*]] = add <2 x i64> [[STRIDED_VEC4]], splat (i64 5)
|
|
; FIXED-NEXT: [[TMP7:%.*]] = add <2 x i64> [[STRIDED_VEC5]], splat (i64 6)
|
|
; FIXED-NEXT: [[TMP8:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP10:%.*]] = shufflevector <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP11:%.*]] = shufflevector <4 x i64> [[TMP8]], <4 x i64> [[TMP9]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP12:%.*]] = shufflevector <4 x i64> [[TMP10]], <4 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
|
|
; FIXED-NEXT: [[TMP13:%.*]] = shufflevector <8 x i64> [[TMP11]], <8 x i64> [[TMP12]], <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <12 x i64> [[TMP13]], <12 x i64> poison, <12 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11>
|
|
; FIXED-NEXT: store <12 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
|
|
; FIXED-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 6
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; FIXED-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; FIXED-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; FIXED-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; FIXED-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; FIXED-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; FIXED-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; FIXED-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; FIXED-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; FIXED-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; FIXED-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; FIXED-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor6(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; SCALABLE-NEXT: [[TMP6:%.*]] = mul i64 [[INDEX]], 6
|
|
; SCALABLE-NEXT: [[TMP21:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 6
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vp.load.nxv6i64.p0(ptr align 8 [[TMP21]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave6.nxv6i64(<vscale x 6 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 5
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; SCALABLE-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; SCALABLE-NEXT: [[TMP18:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; SCALABLE-NEXT: [[TMP19:%.*]] = add <vscale x 1 x i64> [[TMP13]], splat (i64 6)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 6
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 6 x i64> @llvm.vector.interleave6.nxv6i64(<vscale x 1 x i64> [[TMP14]], <vscale x 1 x i64> [[TMP15]], <vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]], <vscale x 1 x i64> [[TMP18]], <vscale x 1 x i64> [[TMP19]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv6i64.p0(<vscale x 6 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP21]], <vscale x 6 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP28:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP28]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP28]]
|
|
; SCALABLE-NEXT: [[TMP22:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 6
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; SCALABLE-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; SCALABLE-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; SCALABLE-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; SCALABLE-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; SCALABLE-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; SCALABLE-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; SCALABLE-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; SCALABLE-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; SCALABLE-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; SCALABLE-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; SCALABLE-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = mul i64 %i, 6
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i64, ptr %p, i64 %offset2
|
|
%x2 = load i64, ptr %q2
|
|
%y2 = add i64 %x2, 3
|
|
store i64 %y2, ptr %q2
|
|
|
|
%offset3 = add i64 %offset2, 1
|
|
%q3 = getelementptr i64, ptr %p, i64 %offset3
|
|
%x3 = load i64, ptr %q3
|
|
%y3 = add i64 %x3, 4
|
|
store i64 %y3, ptr %q3
|
|
|
|
%offset4 = add i64 %offset3, 1
|
|
%q4 = getelementptr i64, ptr %p, i64 %offset4
|
|
%x4 = load i64, ptr %q4
|
|
%y4 = add i64 %x4, 5
|
|
store i64 %y4, ptr %q4
|
|
|
|
%offset5 = add i64 %offset4, 1
|
|
%q5 = getelementptr i64, ptr %p, i64 %offset5
|
|
%x5 = load i64, ptr %q5
|
|
%y5 = add i64 %x5, 6
|
|
store i64 %y5, ptr %q5
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor7(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor7(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[INDEX]], 7
|
|
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 7
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 7 x i64> @llvm.vp.load.nxv7i64.p0(ptr align 8 [[TMP23]], <vscale x 7 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave7.nxv7i64(<vscale x 7 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 5
|
|
; CHECK-NEXT: [[TMP14:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 6
|
|
; CHECK-NEXT: [[TMP15:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; CHECK-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; CHECK-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; CHECK-NEXT: [[TMP18:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; CHECK-NEXT: [[TMP19:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; CHECK-NEXT: [[TMP20:%.*]] = add <vscale x 1 x i64> [[TMP13]], splat (i64 6)
|
|
; CHECK-NEXT: [[TMP21:%.*]] = add <vscale x 1 x i64> [[TMP14]], splat (i64 7)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 7
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 7 x i64> @llvm.vector.interleave7.nxv7i64(<vscale x 1 x i64> [[TMP15]], <vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]], <vscale x 1 x i64> [[TMP18]], <vscale x 1 x i64> [[TMP19]], <vscale x 1 x i64> [[TMP20]], <vscale x 1 x i64> [[TMP21]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv7i64.p0(<vscale x 7 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP23]], <vscale x 7 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP31:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP31]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP31]]
|
|
; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP24]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 7
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; CHECK-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; CHECK-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; CHECK-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; CHECK-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; CHECK-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; CHECK-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; CHECK-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; CHECK-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; CHECK-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; CHECK-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; CHECK-NEXT: [[OFFSET6:%.*]] = add i64 [[OFFSET5]], 1
|
|
; CHECK-NEXT: [[Q6:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET6]]
|
|
; CHECK-NEXT: [[X6:%.*]] = load i64, ptr [[Q6]], align 8
|
|
; CHECK-NEXT: [[Y6:%.*]] = add i64 [[X6]], 7
|
|
; CHECK-NEXT: store i64 [[Y6]], ptr [[Q6]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor7(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = mul i64 [[INDEX]], 7
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <14 x i64>, ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 0, i32 7>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 1, i32 8>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 2, i32 9>
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 3, i32 10>
|
|
; FIXED-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 4, i32 11>
|
|
; FIXED-NEXT: [[STRIDED_VEC5:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 5, i32 12>
|
|
; FIXED-NEXT: [[STRIDED_VEC6:%.*]] = shufflevector <14 x i64> [[WIDE_VEC]], <14 x i64> poison, <2 x i32> <i32 6, i32 13>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <2 x i64> [[STRIDED_VEC]], splat (i64 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <2 x i64> [[STRIDED_VEC1]], splat (i64 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <2 x i64> [[STRIDED_VEC2]], splat (i64 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = add <2 x i64> [[STRIDED_VEC3]], splat (i64 4)
|
|
; FIXED-NEXT: [[TMP6:%.*]] = add <2 x i64> [[STRIDED_VEC4]], splat (i64 5)
|
|
; FIXED-NEXT: [[TMP7:%.*]] = add <2 x i64> [[STRIDED_VEC5]], splat (i64 6)
|
|
; FIXED-NEXT: [[TMP8:%.*]] = add <2 x i64> [[STRIDED_VEC6]], splat (i64 7)
|
|
; FIXED-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP10:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP11:%.*]] = shufflevector <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP12:%.*]] = shufflevector <4 x i64> [[TMP9]], <4 x i64> [[TMP10]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP13:%.*]] = shufflevector <2 x i64> [[TMP8]], <2 x i64> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
|
|
; FIXED-NEXT: [[TMP14:%.*]] = shufflevector <4 x i64> [[TMP11]], <4 x i64> [[TMP13]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
|
; FIXED-NEXT: [[TMP15:%.*]] = shufflevector <6 x i64> [[TMP14]], <6 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 poison, i32 poison>
|
|
; FIXED-NEXT: [[TMP16:%.*]] = shufflevector <8 x i64> [[TMP12]], <8 x i64> [[TMP15]], <14 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <14 x i64> [[TMP16]], <14 x i64> poison, <14 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13>
|
|
; FIXED-NEXT: store <14 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
|
|
; FIXED-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP17]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 7
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; FIXED-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; FIXED-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; FIXED-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; FIXED-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; FIXED-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; FIXED-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; FIXED-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; FIXED-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; FIXED-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; FIXED-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; FIXED-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; FIXED-NEXT: [[OFFSET6:%.*]] = add i64 [[OFFSET5]], 1
|
|
; FIXED-NEXT: [[Q6:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET6]]
|
|
; FIXED-NEXT: [[X6:%.*]] = load i64, ptr [[Q6]], align 8
|
|
; FIXED-NEXT: [[Y6:%.*]] = add i64 [[X6]], 7
|
|
; FIXED-NEXT: store i64 [[Y6]], ptr [[Q6]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor7(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; SCALABLE-NEXT: [[TMP6:%.*]] = mul i64 [[INDEX]], 7
|
|
; SCALABLE-NEXT: [[TMP23:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 7
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 7 x i64> @llvm.vp.load.nxv7i64.p0(ptr align 8 [[TMP23]], <vscale x 7 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave7.nxv7i64(<vscale x 7 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 5
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 6
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; SCALABLE-NEXT: [[TMP18:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; SCALABLE-NEXT: [[TMP19:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; SCALABLE-NEXT: [[TMP20:%.*]] = add <vscale x 1 x i64> [[TMP13]], splat (i64 6)
|
|
; SCALABLE-NEXT: [[TMP21:%.*]] = add <vscale x 1 x i64> [[TMP14]], splat (i64 7)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 7
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 7 x i64> @llvm.vector.interleave7.nxv7i64(<vscale x 1 x i64> [[TMP15]], <vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]], <vscale x 1 x i64> [[TMP18]], <vscale x 1 x i64> [[TMP19]], <vscale x 1 x i64> [[TMP20]], <vscale x 1 x i64> [[TMP21]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv7i64.p0(<vscale x 7 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP23]], <vscale x 7 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP31:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP31]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP31]]
|
|
; SCALABLE-NEXT: [[TMP24:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP24]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = mul i64 [[I]], 7
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; SCALABLE-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; SCALABLE-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; SCALABLE-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; SCALABLE-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; SCALABLE-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; SCALABLE-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; SCALABLE-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; SCALABLE-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; SCALABLE-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; SCALABLE-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; SCALABLE-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET6:%.*]] = add i64 [[OFFSET5]], 1
|
|
; SCALABLE-NEXT: [[Q6:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET6]]
|
|
; SCALABLE-NEXT: [[X6:%.*]] = load i64, ptr [[Q6]], align 8
|
|
; SCALABLE-NEXT: [[Y6:%.*]] = add i64 [[X6]], 7
|
|
; SCALABLE-NEXT: store i64 [[Y6]], ptr [[Q6]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = mul i64 %i, 7
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i64, ptr %p, i64 %offset2
|
|
%x2 = load i64, ptr %q2
|
|
%y2 = add i64 %x2, 3
|
|
store i64 %y2, ptr %q2
|
|
|
|
%offset3 = add i64 %offset2, 1
|
|
%q3 = getelementptr i64, ptr %p, i64 %offset3
|
|
%x3 = load i64, ptr %q3
|
|
%y3 = add i64 %x3, 4
|
|
store i64 %y3, ptr %q3
|
|
|
|
%offset4 = add i64 %offset3, 1
|
|
%q4 = getelementptr i64, ptr %p, i64 %offset4
|
|
%x4 = load i64, ptr %q4
|
|
%y4 = add i64 %x4, 5
|
|
store i64 %y4, ptr %q4
|
|
|
|
%offset5 = add i64 %offset4, 1
|
|
%q5 = getelementptr i64, ptr %p, i64 %offset5
|
|
%x5 = load i64, ptr %q5
|
|
%y5 = add i64 %x5, 6
|
|
store i64 %y5, ptr %q5
|
|
|
|
%offset6 = add i64 %offset5, 1
|
|
%q6 = getelementptr i64, ptr %p, i64 %offset6
|
|
%x6 = load i64, ptr %q6
|
|
%y6 = add i64 %x6, 7
|
|
store i64 %y6, ptr %q6
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @load_store_factor8(ptr %p) {
|
|
; CHECK-LABEL: @load_store_factor8(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[INDEX]], 3
|
|
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 8
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0(ptr align 8 [[TMP24]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave8.nxv8i64(<vscale x 8 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 5
|
|
; CHECK-NEXT: [[TMP14:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 6
|
|
; CHECK-NEXT: [[TMP15:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 7
|
|
; CHECK-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; CHECK-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; CHECK-NEXT: [[TMP18:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; CHECK-NEXT: [[TMP19:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; CHECK-NEXT: [[TMP20:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; CHECK-NEXT: [[TMP21:%.*]] = add <vscale x 1 x i64> [[TMP13]], splat (i64 6)
|
|
; CHECK-NEXT: [[TMP22:%.*]] = add <vscale x 1 x i64> [[TMP14]], splat (i64 7)
|
|
; CHECK-NEXT: [[TMP23:%.*]] = add <vscale x 1 x i64> [[TMP15]], splat (i64 8)
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 8
|
|
; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vector.interleave8.nxv8i64(<vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]], <vscale x 1 x i64> [[TMP18]], <vscale x 1 x i64> [[TMP19]], <vscale x 1 x i64> [[TMP20]], <vscale x 1 x i64> [[TMP21]], <vscale x 1 x i64> [[TMP22]], <vscale x 1 x i64> [[TMP23]])
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv8i64.p0(<vscale x 8 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP24]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; CHECK-NEXT: [[TMP34:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP34]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP34]]
|
|
; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP25]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 3
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; CHECK-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; CHECK-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; CHECK-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; CHECK-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; CHECK-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; CHECK-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; CHECK-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; CHECK-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; CHECK-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; CHECK-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; CHECK-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; CHECK-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; CHECK-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; CHECK-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; CHECK-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; CHECK-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; CHECK-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; CHECK-NEXT: [[OFFSET6:%.*]] = add i64 [[OFFSET5]], 1
|
|
; CHECK-NEXT: [[Q6:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET6]]
|
|
; CHECK-NEXT: [[X6:%.*]] = load i64, ptr [[Q6]], align 8
|
|
; CHECK-NEXT: [[Y6:%.*]] = add i64 [[X6]], 7
|
|
; CHECK-NEXT: store i64 [[Y6]], ptr [[Q6]], align 8
|
|
; CHECK-NEXT: [[OFFSET7:%.*]] = add i64 [[OFFSET6]], 1
|
|
; CHECK-NEXT: [[Q7:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET7]]
|
|
; CHECK-NEXT: [[X7:%.*]] = load i64, ptr [[Q7]], align 8
|
|
; CHECK-NEXT: [[Y7:%.*]] = add i64 [[X7]], 8
|
|
; CHECK-NEXT: store i64 [[Y7]], ptr [[Q7]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @load_store_factor8(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP0:%.*]] = shl i64 [[INDEX]], 3
|
|
; FIXED-NEXT: [[TMP1:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP0]]
|
|
; FIXED-NEXT: [[WIDE_VEC:%.*]] = load <16 x i64>, ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 0, i32 8>
|
|
; FIXED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 1, i32 9>
|
|
; FIXED-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 2, i32 10>
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 3, i32 11>
|
|
; FIXED-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 4, i32 12>
|
|
; FIXED-NEXT: [[STRIDED_VEC5:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 5, i32 13>
|
|
; FIXED-NEXT: [[STRIDED_VEC6:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 6, i32 14>
|
|
; FIXED-NEXT: [[STRIDED_VEC7:%.*]] = shufflevector <16 x i64> [[WIDE_VEC]], <16 x i64> poison, <2 x i32> <i32 7, i32 15>
|
|
; FIXED-NEXT: [[TMP2:%.*]] = add <2 x i64> [[STRIDED_VEC]], splat (i64 1)
|
|
; FIXED-NEXT: [[TMP3:%.*]] = add <2 x i64> [[STRIDED_VEC1]], splat (i64 2)
|
|
; FIXED-NEXT: [[TMP4:%.*]] = add <2 x i64> [[STRIDED_VEC2]], splat (i64 3)
|
|
; FIXED-NEXT: [[TMP5:%.*]] = add <2 x i64> [[STRIDED_VEC3]], splat (i64 4)
|
|
; FIXED-NEXT: [[TMP6:%.*]] = add <2 x i64> [[STRIDED_VEC4]], splat (i64 5)
|
|
; FIXED-NEXT: [[TMP7:%.*]] = add <2 x i64> [[STRIDED_VEC5]], splat (i64 6)
|
|
; FIXED-NEXT: [[TMP8:%.*]] = add <2 x i64> [[STRIDED_VEC6]], splat (i64 7)
|
|
; FIXED-NEXT: [[TMP9:%.*]] = add <2 x i64> [[STRIDED_VEC7]], splat (i64 8)
|
|
; FIXED-NEXT: [[TMP10:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP11:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP12:%.*]] = shufflevector <2 x i64> [[TMP6]], <2 x i64> [[TMP7]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP13:%.*]] = shufflevector <2 x i64> [[TMP8]], <2 x i64> [[TMP9]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
; FIXED-NEXT: [[TMP14:%.*]] = shufflevector <4 x i64> [[TMP10]], <4 x i64> [[TMP11]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP15:%.*]] = shufflevector <4 x i64> [[TMP12]], <4 x i64> [[TMP13]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
; FIXED-NEXT: [[TMP16:%.*]] = shufflevector <8 x i64> [[TMP14]], <8 x i64> [[TMP15]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
; FIXED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <16 x i64> [[TMP16]], <16 x i64> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
|
|
; FIXED-NEXT: store <16 x i64> [[INTERLEAVED_VEC]], ptr [[TMP1]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
|
|
; FIXED-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP17]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 3
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; FIXED-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; FIXED-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; FIXED-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; FIXED-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; FIXED-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; FIXED-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; FIXED-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; FIXED-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; FIXED-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; FIXED-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; FIXED-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; FIXED-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; FIXED-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; FIXED-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; FIXED-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; FIXED-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; FIXED-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; FIXED-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; FIXED-NEXT: [[OFFSET6:%.*]] = add i64 [[OFFSET5]], 1
|
|
; FIXED-NEXT: [[Q6:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET6]]
|
|
; FIXED-NEXT: [[X6:%.*]] = load i64, ptr [[Q6]], align 8
|
|
; FIXED-NEXT: [[Y6:%.*]] = add i64 [[X6]], 7
|
|
; FIXED-NEXT: store i64 [[Y6]], ptr [[Q6]], align 8
|
|
; FIXED-NEXT: [[OFFSET7:%.*]] = add i64 [[OFFSET6]], 1
|
|
; FIXED-NEXT: [[Q7:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET7]]
|
|
; FIXED-NEXT: [[X7:%.*]] = load i64, ptr [[Q7]], align 8
|
|
; FIXED-NEXT: [[Y7:%.*]] = add i64 [[X7]], 8
|
|
; FIXED-NEXT: store i64 [[Y7]], ptr [[Q7]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @load_store_factor8(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 1, i1 true)
|
|
; SCALABLE-NEXT: [[TMP6:%.*]] = shl i64 [[INDEX]], 3
|
|
; SCALABLE-NEXT: [[TMP24:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP6]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 8
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0(ptr align 8 [[TMP24]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave8.nxv8i64(<vscale x 8 x i64> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 2
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 3
|
|
; SCALABLE-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 4
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 5
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 6
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64> } [[STRIDED_VEC]], 7
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = add <vscale x 1 x i64> [[TMP8]], splat (i64 1)
|
|
; SCALABLE-NEXT: [[TMP17:%.*]] = add <vscale x 1 x i64> [[TMP9]], splat (i64 2)
|
|
; SCALABLE-NEXT: [[TMP18:%.*]] = add <vscale x 1 x i64> [[TMP10]], splat (i64 3)
|
|
; SCALABLE-NEXT: [[TMP19:%.*]] = add <vscale x 1 x i64> [[TMP11]], splat (i64 4)
|
|
; SCALABLE-NEXT: [[TMP20:%.*]] = add <vscale x 1 x i64> [[TMP12]], splat (i64 5)
|
|
; SCALABLE-NEXT: [[TMP21:%.*]] = add <vscale x 1 x i64> [[TMP13]], splat (i64 6)
|
|
; SCALABLE-NEXT: [[TMP22:%.*]] = add <vscale x 1 x i64> [[TMP14]], splat (i64 7)
|
|
; SCALABLE-NEXT: [[TMP23:%.*]] = add <vscale x 1 x i64> [[TMP15]], splat (i64 8)
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL1:%.*]] = mul nuw nsw i32 [[TMP7]], 8
|
|
; SCALABLE-NEXT: [[INTERLEAVED_VEC:%.*]] = call <vscale x 8 x i64> @llvm.vector.interleave8.nxv8i64(<vscale x 1 x i64> [[TMP16]], <vscale x 1 x i64> [[TMP17]], <vscale x 1 x i64> [[TMP18]], <vscale x 1 x i64> [[TMP19]], <vscale x 1 x i64> [[TMP20]], <vscale x 1 x i64> [[TMP21]], <vscale x 1 x i64> [[TMP22]], <vscale x 1 x i64> [[TMP23]])
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv8i64.p0(<vscale x 8 x i64> [[INTERLEAVED_VEC]], ptr align 8 [[TMP24]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL1]])
|
|
; SCALABLE-NEXT: [[TMP34:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP34]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP34]]
|
|
; SCALABLE-NEXT: [[TMP25:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP25]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 3
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[Y0:%.*]] = add i64 [[X0]], 1
|
|
; SCALABLE-NEXT: store i64 [[Y0]], ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[Y1:%.*]] = add i64 [[X1]], 2
|
|
; SCALABLE-NEXT: store i64 [[Y1]], ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET2:%.*]] = add i64 [[OFFSET1]], 1
|
|
; SCALABLE-NEXT: [[Q2:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET2]]
|
|
; SCALABLE-NEXT: [[X2:%.*]] = load i64, ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[Y2:%.*]] = add i64 [[X2]], 3
|
|
; SCALABLE-NEXT: store i64 [[Y2]], ptr [[Q2]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET3:%.*]] = add i64 [[OFFSET2]], 1
|
|
; SCALABLE-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET3]]
|
|
; SCALABLE-NEXT: [[X3:%.*]] = load i64, ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[Y3:%.*]] = add i64 [[X3]], 4
|
|
; SCALABLE-NEXT: store i64 [[Y3]], ptr [[Q3]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET4:%.*]] = add i64 [[OFFSET3]], 1
|
|
; SCALABLE-NEXT: [[Q4:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET4]]
|
|
; SCALABLE-NEXT: [[X4:%.*]] = load i64, ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[Y4:%.*]] = add i64 [[X4]], 5
|
|
; SCALABLE-NEXT: store i64 [[Y4]], ptr [[Q4]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET5:%.*]] = add i64 [[OFFSET4]], 1
|
|
; SCALABLE-NEXT: [[Q5:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET5]]
|
|
; SCALABLE-NEXT: [[X5:%.*]] = load i64, ptr [[Q5]], align 8
|
|
; SCALABLE-NEXT: [[Y5:%.*]] = add i64 [[X5]], 6
|
|
; SCALABLE-NEXT: store i64 [[Y5]], ptr [[Q5]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET6:%.*]] = add i64 [[OFFSET5]], 1
|
|
; SCALABLE-NEXT: [[Q6:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET6]]
|
|
; SCALABLE-NEXT: [[X6:%.*]] = load i64, ptr [[Q6]], align 8
|
|
; SCALABLE-NEXT: [[Y6:%.*]] = add i64 [[X6]], 7
|
|
; SCALABLE-NEXT: store i64 [[Y6]], ptr [[Q6]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET7:%.*]] = add i64 [[OFFSET6]], 1
|
|
; SCALABLE-NEXT: [[Q7:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET7]]
|
|
; SCALABLE-NEXT: [[X7:%.*]] = load i64, ptr [[Q7]], align 8
|
|
; SCALABLE-NEXT: [[Y7:%.*]] = add i64 [[X7]], 8
|
|
; SCALABLE-NEXT: store i64 [[Y7]], ptr [[Q7]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = shl i64 %i, 3
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
%y0 = add i64 %x0, 1
|
|
store i64 %y0, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
%y1 = add i64 %x1, 2
|
|
store i64 %y1, ptr %q1
|
|
|
|
%offset2 = add i64 %offset1, 1
|
|
%q2 = getelementptr i64, ptr %p, i64 %offset2
|
|
%x2 = load i64, ptr %q2
|
|
%y2 = add i64 %x2, 3
|
|
store i64 %y2, ptr %q2
|
|
|
|
%offset3 = add i64 %offset2, 1
|
|
%q3 = getelementptr i64, ptr %p, i64 %offset3
|
|
%x3 = load i64, ptr %q3
|
|
%y3 = add i64 %x3, 4
|
|
store i64 %y3, ptr %q3
|
|
|
|
%offset4 = add i64 %offset3, 1
|
|
%q4 = getelementptr i64, ptr %p, i64 %offset4
|
|
%x4 = load i64, ptr %q4
|
|
%y4 = add i64 %x4, 5
|
|
store i64 %y4, ptr %q4
|
|
|
|
%offset5 = add i64 %offset4, 1
|
|
%q5 = getelementptr i64, ptr %p, i64 %offset5
|
|
%x5 = load i64, ptr %q5
|
|
%y5 = add i64 %x5, 6
|
|
store i64 %y5, ptr %q5
|
|
|
|
%offset6 = add i64 %offset5, 1
|
|
%q6 = getelementptr i64, ptr %p, i64 %offset6
|
|
%x6 = load i64, ptr %q6
|
|
%y6 = add i64 %x6, 7
|
|
store i64 %y6, ptr %q6
|
|
|
|
%offset7 = add i64 %offset6, 1
|
|
%q7 = getelementptr i64, ptr %p, i64 %offset7
|
|
%x7 = load i64, ptr %q7
|
|
%y7 = add i64 %x7, 8
|
|
store i64 %y7, ptr %q7
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @combine_load_factor2_i32(ptr noalias %p, ptr noalias %q) {
|
|
; CHECK-LABEL: @combine_load_factor2_i32(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
|
|
; CHECK-NEXT: [[TMP13:%.*]] = shl i64 [[INDEX]], 1
|
|
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP13]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i32> @llvm.vp.load.nxv8i32.p0(ptr align 4 [[TMP15]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = add <vscale x 4 x i32> [[TMP8]], [[TMP9]]
|
|
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP10]], ptr align 4 [[TMP11]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP7]])
|
|
; CHECK-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
|
|
; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
|
|
; CHECK-NEXT: [[RES:%.*]] = add i32 [[X0]], [[X1]]
|
|
; CHECK-NEXT: [[DST:%.*]] = getelementptr i32, ptr [[Q]], i64 [[I]]
|
|
; CHECK-NEXT: store i32 [[RES]], ptr [[DST]], align 4
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @combine_load_factor2_i32(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX]], 1
|
|
; FIXED-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP2]]
|
|
; FIXED-NEXT: [[WIDE_VEC2:%.*]] = load <16 x i32>, ptr [[TMP4]], align 4
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <16 x i32> [[WIDE_VEC2]], <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
|
|
; FIXED-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <16 x i32> [[WIDE_VEC2]], <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
|
|
; FIXED-NEXT: [[TMP6:%.*]] = add <8 x i32> [[STRIDED_VEC3]], [[STRIDED_VEC4]]
|
|
; FIXED-NEXT: [[TMP7:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
|
|
; FIXED-NEXT: store <8 x i32> [[TMP6]], ptr [[TMP7]], align 4
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
|
|
; FIXED-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
|
|
; FIXED-NEXT: [[RES:%.*]] = add i32 [[X0]], [[X1]]
|
|
; FIXED-NEXT: [[DST:%.*]] = getelementptr i32, ptr [[Q]], i64 [[I]]
|
|
; FIXED-NEXT: store i32 [[RES]], ptr [[DST]], align 4
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @combine_load_factor2_i32(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = shl i64 [[INDEX]], 1
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP13]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 8 x i32> @llvm.vp.load.nxv8i32.p0(ptr align 4 [[TMP15]], <vscale x 8 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> [[WIDE_MASKED_VEC]])
|
|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = add <vscale x 4 x i32> [[TMP8]], [[TMP9]]
|
|
; SCALABLE-NEXT: [[TMP11:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
|
|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP10]], ptr align 4 [[TMP11]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP7]])
|
|
; SCALABLE-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
|
|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i32, ptr [[Q0]], align 4
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i32, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i32, ptr [[Q1]], align 4
|
|
; SCALABLE-NEXT: [[RES:%.*]] = add i32 [[X0]], [[X1]]
|
|
; SCALABLE-NEXT: [[DST:%.*]] = getelementptr i32, ptr [[Q]], i64 [[I]]
|
|
; SCALABLE-NEXT: store i32 [[RES]], ptr [[DST]], align 4
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = shl i64 %i, 1
|
|
%q0 = getelementptr i32, ptr %p, i64 %offset0
|
|
%x0 = load i32, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i32, ptr %p, i64 %offset1
|
|
%x1 = load i32, ptr %q1
|
|
|
|
%res = add i32 %x0, %x1
|
|
|
|
%dst = getelementptr i32, ptr %q, i64 %i
|
|
store i32 %res, ptr %dst
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
define void @combine_load_factor2_i64(ptr noalias %p, ptr noalias %q) {
|
|
; CHECK-LABEL: @combine_load_factor2_i64(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; CHECK: vector.ph:
|
|
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; CHECK: vector.body:
|
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; CHECK-NEXT: [[TMP13:%.*]] = shl i64 [[INDEX]], 1
|
|
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP13]]
|
|
; CHECK-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
|
|
; CHECK-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 4 x i64> @llvm.vp.load.nxv4i64.p0(ptr align 8 [[TMP15]], <vscale x 4 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64> [[WIDE_MASKED_VEC]])
|
|
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; CHECK-NEXT: [[TMP10:%.*]] = add <vscale x 2 x i64> [[TMP8]], [[TMP9]]
|
|
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[Q:%.*]], i64 [[INDEX]]
|
|
; CHECK-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP10]], ptr align 8 [[TMP11]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP7]])
|
|
; CHECK-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
|
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
|
|
; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
|
|
; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
|
|
; CHECK: middle.block:
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
|
; CHECK: scalar.ph:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; CHECK-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; CHECK-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; CHECK-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; CHECK-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; CHECK-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; CHECK-NEXT: [[RES:%.*]] = add i64 [[X0]], [[X1]]
|
|
; CHECK-NEXT: [[DST:%.*]] = getelementptr i64, ptr [[Q]], i64 [[I]]
|
|
; CHECK-NEXT: store i64 [[RES]], ptr [[DST]], align 8
|
|
; CHECK-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; CHECK-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
; FIXED-LABEL: @combine_load_factor2_i64(
|
|
; FIXED-NEXT: entry:
|
|
; FIXED-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; FIXED: vector.ph:
|
|
; FIXED-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; FIXED: vector.body:
|
|
; FIXED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; FIXED-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX]], 1
|
|
; FIXED-NEXT: [[TMP4:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP2]]
|
|
; FIXED-NEXT: [[WIDE_VEC2:%.*]] = load <8 x i64>, ptr [[TMP4]], align 8
|
|
; FIXED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <8 x i64> [[WIDE_VEC2]], <8 x i64> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
|
|
; FIXED-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <8 x i64> [[WIDE_VEC2]], <8 x i64> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
|
|
; FIXED-NEXT: [[TMP6:%.*]] = add <4 x i64> [[STRIDED_VEC3]], [[STRIDED_VEC4]]
|
|
; FIXED-NEXT: [[TMP7:%.*]] = getelementptr i64, ptr [[Q:%.*]], i64 [[INDEX]]
|
|
; FIXED-NEXT: store <4 x i64> [[TMP6]], ptr [[TMP7]], align 8
|
|
; FIXED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
|
; FIXED-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
|
|
; FIXED-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
|
|
; FIXED: middle.block:
|
|
; FIXED-NEXT: br label [[EXIT:%.*]]
|
|
; FIXED: scalar.ph:
|
|
; FIXED-NEXT: br label [[LOOP:%.*]]
|
|
; FIXED: loop:
|
|
; FIXED-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; FIXED-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; FIXED-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; FIXED-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; FIXED-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; FIXED-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; FIXED-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; FIXED-NEXT: [[RES:%.*]] = add i64 [[X0]], [[X1]]
|
|
; FIXED-NEXT: [[DST:%.*]] = getelementptr i64, ptr [[Q]], i64 [[I]]
|
|
; FIXED-NEXT: store i64 [[RES]], ptr [[DST]], align 8
|
|
; FIXED-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; FIXED-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; FIXED-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; FIXED: exit:
|
|
; FIXED-NEXT: ret void
|
|
;
|
|
; SCALABLE-LABEL: @combine_load_factor2_i64(
|
|
; SCALABLE-NEXT: entry:
|
|
; SCALABLE-NEXT: br label [[VECTOR_PH:%.*]]
|
|
; SCALABLE: vector.ph:
|
|
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
|
|
; SCALABLE: vector.body:
|
|
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[AVL:%.*]] = phi i64 [ 1024, [[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], [[VECTOR_BODY]] ]
|
|
; SCALABLE-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
|
|
; SCALABLE-NEXT: [[TMP13:%.*]] = shl i64 [[INDEX]], 1
|
|
; SCALABLE-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[P:%.*]], i64 [[TMP13]]
|
|
; SCALABLE-NEXT: [[INTERLEAVE_EVL:%.*]] = mul nuw nsw i32 [[TMP7]], 2
|
|
; SCALABLE-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <vscale x 4 x i64> @llvm.vp.load.nxv4i64.p0(ptr align 8 [[TMP15]], <vscale x 4 x i1> splat (i1 true), i32 [[INTERLEAVE_EVL]])
|
|
; SCALABLE-NEXT: [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64> [[WIDE_MASKED_VEC]])
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|
; SCALABLE-NEXT: [[TMP8:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 0
|
|
; SCALABLE-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } [[STRIDED_VEC]], 1
|
|
; SCALABLE-NEXT: [[TMP10:%.*]] = add <vscale x 2 x i64> [[TMP8]], [[TMP9]]
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|
; SCALABLE-NEXT: [[TMP11:%.*]] = getelementptr i64, ptr [[Q:%.*]], i64 [[INDEX]]
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|
; SCALABLE-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP10]], ptr align 8 [[TMP11]], <vscale x 2 x i1> splat (i1 true), i32 [[TMP7]])
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|
; SCALABLE-NEXT: [[TMP16:%.*]] = zext i32 [[TMP7]] to i64
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|
; SCALABLE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[TMP16]], [[INDEX]]
|
|
; SCALABLE-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP16]]
|
|
; SCALABLE-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
|
|
; SCALABLE-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
|
|
; SCALABLE: middle.block:
|
|
; SCALABLE-NEXT: br label [[EXIT:%.*]]
|
|
; SCALABLE: scalar.ph:
|
|
; SCALABLE-NEXT: br label [[LOOP:%.*]]
|
|
; SCALABLE: loop:
|
|
; SCALABLE-NEXT: [[I:%.*]] = phi i64 [ 0, [[SCALAR_PH:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
|
|
; SCALABLE-NEXT: [[OFFSET0:%.*]] = shl i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[Q0:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET0]]
|
|
; SCALABLE-NEXT: [[X0:%.*]] = load i64, ptr [[Q0]], align 8
|
|
; SCALABLE-NEXT: [[OFFSET1:%.*]] = add i64 [[OFFSET0]], 1
|
|
; SCALABLE-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[P]], i64 [[OFFSET1]]
|
|
; SCALABLE-NEXT: [[X1:%.*]] = load i64, ptr [[Q1]], align 8
|
|
; SCALABLE-NEXT: [[RES:%.*]] = add i64 [[X0]], [[X1]]
|
|
; SCALABLE-NEXT: [[DST:%.*]] = getelementptr i64, ptr [[Q]], i64 [[I]]
|
|
; SCALABLE-NEXT: store i64 [[RES]], ptr [[DST]], align 8
|
|
; SCALABLE-NEXT: [[NEXTI]] = add i64 [[I]], 1
|
|
; SCALABLE-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXTI]], 1024
|
|
; SCALABLE-NEXT: br i1 [[DONE]], label [[EXIT]], label [[LOOP]]
|
|
; SCALABLE: exit:
|
|
; SCALABLE-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
loop:
|
|
%i = phi i64 [0, %entry], [%nexti, %loop]
|
|
|
|
%offset0 = shl i64 %i, 1
|
|
%q0 = getelementptr i64, ptr %p, i64 %offset0
|
|
%x0 = load i64, ptr %q0
|
|
|
|
%offset1 = add i64 %offset0, 1
|
|
%q1 = getelementptr i64, ptr %p, i64 %offset1
|
|
%x1 = load i64, ptr %q1
|
|
|
|
%res = add i64 %x0, %x1
|
|
|
|
%dst = getelementptr i64, ptr %q, i64 %i
|
|
store i64 %res, ptr %dst
|
|
|
|
%nexti = add i64 %i, 1
|
|
%done = icmp eq i64 %nexti, 1024
|
|
br i1 %done, label %exit, label %loop
|
|
exit:
|
|
ret void
|
|
}
|