Adds `MemWrite` side effect to `amx.tile_zero` and `amx.tile_load` ops.
Memory write models hardware populating AMX tiles with specified values
through tile zero and load ops.
Making the side effect explicit allows to use multiple op instances as a
compilation hint to use different AMX tile registers. This can prevent
less efficient lowering through tile store-load copies compared to
directly populating tiles with values.
To illustrate the trade off:
Without explicit side effects, `CSE` optimizes two `amx.tile_zero` into
a single op which lowers to a copy for the second tile:
```
tilezero %tmm0
tilestored %tmm0, -2032(%rbp,%rbx) # 1024-byte Folded Spill
tileloadd -2032(%rbp,%rbx), %tmm1 # 1024-byte Folded Reload
```
By keeping the two `amx.tile_zero` ops and, thus, lowering to two
separate intrinsic invocations, the two tile registers are zeroed out
directly without the additional round trip through memory:
```
tilezero %tmm0
tilezero %tmm1
```
The same principle applies to `amx.tile_load` ops.
448811dfc2