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llvm-project/llvm/lib/Target/AArch64
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Alexey Bataev 6f43d28f34 [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst. 
Need to add NumSrcElts param to is..Mask functions in
ShuffleVectorInstruction class for better mask analysis. Mask.size() not
always matches the sizes of the permuted vector(s). Allows to better
estimate the cost in SLP and fix uses of the functions in other cases.

Differential Revision: https://reviews.llvm.org/D158449
2023-10-03 10:26:11 -07:00
..
AsmParser
[AArch64] Separate PNR into its own Register Class (#65306)
2023-09-21 19:53:16 +01:00
Disassembler
[AArch64] Separate PNR into its own Register Class (#65306)
2023-09-21 19:53:16 +01:00
GISel
[AArch64][GlobalISel] More type support for G_VECREDUCE_ADD (#67433)
2023-09-28 11:47:26 +01:00
MCTargetDesc
[AArch64][Win] Work around an MSVC arm64 compiler bug (#67865)
2023-10-02 10:00:45 -07:00
TargetInfo
…
Utils
[AArch64][SME] Enable TPIDR2 lazy-save for za_preserved
2023-09-20 13:34:41 +00:00
AArch64.h
[AArch64] Move PAuth codegen down the machine pipeline
2023-09-22 14:49:14 +03:00
AArch64.td
[AArch64] Add a target feature for AArch64StorePairSuppress
2023-09-30 11:40:26 +01:00
AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
[AArch64] Separate PNR into its own Register Class (#65306)
2023-09-21 19:53:16 +01:00
AArch64BranchTargets.cpp
…
AArch64CallingConvention.cpp
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AArch64CallingConvention.h
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AArch64CallingConvention.td
[AArch64][Windows] Fix the callee-saved registers for swiftcc on Windows/AArch64
2023-07-12 13:13:21 -07:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
…
AArch64Combine.td
[AArch64][GlobalISel] Select UMULL instruction (#65469)
2023-09-25 09:34:51 +01:00
AArch64CompressJumpTables.cpp
[AArch64CompressJumpTables] Prevent over-compression caused by invalid alignment.
2023-06-15 12:38:20 +00:00
AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
…
AArch64ConditionOptimizer.cpp
…
AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
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AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[llvm] Use llvm::is_contained (NFC)
2023-09-22 17:09:27 -07:00
AArch64FalkorHWPFFix.cpp
…
AArch64FastISel.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64FrameLowering.cpp
[AArch64][Win] Emit SEH instructions for the swift async context-related instructions in the prologue and the epilogue. (#66967)
2023-09-28 09:43:39 -07:00
AArch64FrameLowering.h
[AArch64] Move PAuth codegen down the machine pipeline
2023-09-22 14:49:14 +03:00
AArch64GenRegisterBankInfo.def
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AArch64GlobalsTagging.cpp
…
AArch64InstrAtomics.td
SelectionDAG: Swap operands of atomic_store
2023-08-31 17:30:10 -04:00
AArch64InstrFormats.td
[AArch64] Add patterns for FMADD, FMSUB
2023-08-30 12:39:04 +02:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Select UMULL instruction (#65469)
2023-09-25 09:34:51 +01:00
AArch64InstrInfo.cpp
Revert "CodeGen: Disable isCopyInstrImpl if there are implicit operands"
2023-10-02 22:43:24 +03:00
AArch64InstrInfo.h
[MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode
2023-09-25 10:49:44 +01:00
AArch64InstrInfo.td
[AArch64] Don't expand RSHRN intrinsics to add+srl+trunc.
2023-09-29 08:26:32 +01:00
AArch64ISelDAGToDAG.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64ISelLowering.cpp
[IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
2023-10-03 10:26:11 -07:00
AArch64ISelLowering.h
[GlobalISel] Remove TargetLowering::isConstantUnsignedBitfieldExtractLegal
2023-09-27 15:58:01 +01:00
AArch64LoadStoreOptimizer.cpp
Reapply "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"
2023-09-22 21:08:07 -07:00
AArch64LowerHomogeneousPrologEpilog.cpp
[llvm] Fix duplicate word typos. NFC
2023-09-01 18:25:16 -07:00
AArch64MachineFunctionInfo.cpp
…
AArch64MachineFunctionInfo.h
[AArch64][SME] Disable remat of VL-dependent ops when function changes streaming mode.
2023-09-01 12:13:27 +00:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
[AArch64] Relax binary format switch in AArch64MCInstLower::LowerSymbolOperand to allow non-Darwin Mach-O files (#66011)
2023-09-14 11:12:30 -07:00
AArch64MCInstLower.h
[AArch64] Relax binary format switch in AArch64MCInstLower::LowerSymbolOperand to allow non-Darwin Mach-O files (#66011)
2023-09-14 11:12:30 -07:00
AArch64MIPeepholeOpt.cpp
[AArch64] Fix order of isReg and isDef checks in INSvi64 peephole.
2023-07-12 09:51:28 +01:00
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
…
AArch64PointerAuth.cpp
[AArch64] Move PAuth codegen down the machine pipeline
2023-09-22 14:49:14 +03:00
AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
[AArch64] Fix debug printing crash in AArch64RedundantCopyElimination
2023-08-23 11:49:36 +01:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64][Windows] Fix the callee-saved registers for swiftcc on Windows/AArch64
2023-07-12 13:13:21 -07:00
AArch64RegisterInfo.h
…
AArch64RegisterInfo.td
[AArch64][SME2][SVE2p1] Add PNR_3b regclass (#67785)
2023-09-29 16:17:31 +01:00
AArch64SchedA53.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA55.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA57.td
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AArch64SchedA57WriteRes.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA64FX.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA510.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedAmpere1.td
[AArch64] Split Ampere1Write_Arith into rr/ri and rs/rx InstRWs. (#66384)
2023-09-14 16:29:30 +01:00
AArch64SchedCyclone.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedExynosM3.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedExynosM4.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedExynosM5.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN1.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedNeoverseN2.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedNeoverseV1.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedNeoverseV2.td
[AArch64] Fix schedmodel zero latency moves for Neoverse V2
2023-09-07 10:54:38 +01:00
AArch64SchedPredExynos.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredicates.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredNeoverse.td
[AArch64] Fix schedmodel zero latency moves for Neoverse V2
2023-09-07 10:54:38 +01:00
AArch64SchedThunderX2T99.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedThunderX3T110.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedThunderX.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedTSV110.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[aarch64][NFC] Remove unneeded work from machine memset (#65672)
2023-09-25 17:12:05 -04:00
AArch64SelectionDAGInfo.h
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AArch64SIMDInstrOpt.cpp
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AArch64SLSHardening.cpp
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AArch64SMEInstrInfo.td
[AArch64][SME] Don't use OBSCURE_COPY to avoid rematerialization.
2023-09-01 13:36:03 +00:00
AArch64SpeculationHardening.cpp
[AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
2023-05-23 09:21:17 +01:00
AArch64StackTagging.cpp
[llvm] Drop some bitcasts and references related to typed pointers
2023-08-10 15:07:07 +02:00
AArch64StackTaggingPreRA.cpp
…
AArch64StorePairSuppress.cpp
[AArch64] Add a target feature for AArch64StorePairSuppress
2023-09-30 11:40:26 +01:00
AArch64Subtarget.cpp
[AArch64][SME] Create new interface for isSVEAvailable.
2023-09-01 12:00:36 +00:00
AArch64Subtarget.h
[AArch64][SME] Various tests should work with +sme, just as they do for +sve (#65260)
2023-09-13 11:11:51 +01:00
AArch64SVEInstrInfo.td
[AArch64] Separate PNR into its own Register Class (#65306)
2023-09-21 19:53:16 +01:00
AArch64SystemOperands.td
…
AArch64TargetMachine.cpp
Revert "[AArch64] Enable "sink-and-fold" in MachineSink by default (#67432)"
2023-09-27 14:24:59 +01:00
AArch64TargetMachine.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
…
AArch64TargetTransformInfo.cpp
[COST][AARCH64]Fix crash in cost calculation for shuffles.
2023-10-02 07:49:03 -07:00
AArch64TargetTransformInfo.h
[AArch64][SVE2] Delete an unused parameter for isExtPartOfAvgExpr, NFC
2023-09-01 23:40:52 +08:00
CMakeLists.txt
[AArch64] Move PAuth codegen down the machine pipeline
2023-09-22 14:49:14 +03:00
SMEABIPass.cpp
[AArch64][SME] Emit Zero instruction for NewZA functions
2023-09-15 11:40:30 +01:00
SMEInstrFormats.td
[AArch64] Separate PNR into its own Register Class (#65306)
2023-09-21 19:53:16 +01:00
SVEInstrFormats.td
[CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1
2023-08-09 09:33:45 +00:00
SVEIntrinsicOpts.cpp
[llvm] Drop some bitcasts and references related to typed pointers
2023-08-10 15:07:07 +02:00