9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
31 lines
1.5 KiB
LLVM
31 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn -verify-machineinstrs -mem-intrinsic-expand-size=3 %s -o - | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -mtriple=amdgcn -verify-machineinstrs -mem-intrinsic-expand-size=5 %s -o - | FileCheck -check-prefix=GCN %s
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declare void @llvm.memcpy.inline.p1.p1.i32(ptr addrspace(1), ptr addrspace(1), i32, i1 immarg)
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define amdgpu_cs void @test(ptr addrspace(1) %dst, ptr addrspace(1) %src) {
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; GCN-LABEL: test:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_mov_b32 s2, 0
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; GCN-NEXT: s_mov_b32 s3, 0xf000
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; GCN-NEXT: s_mov_b64 s[0:1], 0
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; GCN-NEXT: buffer_load_ubyte v4, v[2:3], s[0:3], 0 addr64
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_store_byte v4, v[0:1], s[0:3], 0 addr64
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; GCN-NEXT: s_waitcnt expcnt(0)
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; GCN-NEXT: buffer_load_ubyte v4, v[2:3], s[0:3], 0 addr64 offset:1
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_store_byte v4, v[0:1], s[0:3], 0 addr64 offset:1
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; GCN-NEXT: s_waitcnt expcnt(0)
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; GCN-NEXT: buffer_load_ubyte v4, v[2:3], s[0:3], 0 addr64 offset:2
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_store_byte v4, v[0:1], s[0:3], 0 addr64 offset:2
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; GCN-NEXT: buffer_load_ubyte v2, v[2:3], s[0:3], 0 addr64 offset:3
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: buffer_store_byte v2, v[0:1], s[0:3], 0 addr64 offset:3
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; GCN-NEXT: s_endpgm
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call void @llvm.memcpy.inline.p1.p1.i32(ptr addrspace(1) %dst, ptr addrspace(1) %src, i32 4, i1 false)
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ret void
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}
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