Sumanth Gundapaneni aaf2d078b6

[Hexagon] Clean up redundant transfer instructions. (#82663) ...

This patch adds a Hexagon specific backend pass that cleans up redundant
transfers after register allocation.

2024-02-22 17:31:37 -06:00

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cmp-i1.ll

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cmp-v2i1.ll

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cmp-v4i1.ll

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cmp-v8i1.ll

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extload-i1.ll

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logical.ll

[DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)

2023-08-08 20:08:01 -07:00

mulh-scalar.ll

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select-i1.ll

[Hexagon] Add missing patterns for boolean [v]selects

2023-06-17 17:15:07 -07:00

select-vec.ll

[Hexagon] Clean up redundant transfer instructions. (#82663)

2024-02-22 17:31:37 -06:00

trunc-vNi1.ll

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