Logo
Explore Help
Sign In
shylie/llvm-project
1
0
Fork 0
You've already forked llvm-project
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/mlir/lib/Dialect/ArmSVE/Transforms
History
Benjamin Maxwell 7dcca62132
[mlir][ArmSVE] Add arm_sve.zip.x2 and arm_sve.zip.x4 ops (#81278)
This adds ops for the two and four-way SME 2 multi-vector zips.

See:

-
https://developer.arm.com/documentation/ddi0602/2023-12/SME-Instructions/ZIP--two-registers---Interleave-elements-from-two-vectors-?lang=en
-
https://developer.arm.com/documentation/ddi0602/2023-12/SME-Instructions/ZIP--four-registers---Interleave-elements-from-four-vectors-?lang=en
2024-02-16 11:34:34 +00:00
..
CMakeLists.txt
[mlir][ArmSVE] Add -arm-sve-legalize-vector-storage pass (#68794)
2023-10-26 12:18:58 +01:00
LegalizeForLLVMExport.cpp
[mlir][ArmSVE] Add arm_sve.zip.x2 and arm_sve.zip.x4 ops (#81278)
2024-02-16 11:34:34 +00:00
LegalizeVectorStorage.cpp
[mlir][IR] Rename "update root" to "modify op" in rewriter API (#78260)
2024-01-17 11:08:59 +01:00
Powered by Gitea Version: 1.23.1 Page: 367ms Template: 2ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API