41a6bb4c05
Several implementations have zero-latency instructions to zero registers. To-date no implementation has a dedicated SVE instruction but we can use the NEON equivalent because it is defined to zero bits 128..VL regardless of the immediate used. NOTE: The relevant instruction is not available in streaming mode, where the original SVE DUP instruction remains in use.
146 lines
4.2 KiB
LLVM
146 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mattr=+sve < %s | FileCheck %s --check-prefixes=CHECK,SVE
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; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s --check-prefixes=CHECK,STREAMING-SVE
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-none-linux-gnu"
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define <vscale x 2 x i64> @test_zeroinit_2xi64() {
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; SVE-LABEL: test_zeroinit_2xi64:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_2xi64:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.d, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 2 x i64> zeroinitializer
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}
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define <vscale x 4 x i32> @test_zeroinit_4xi32() {
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; SVE-LABEL: test_zeroinit_4xi32:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_4xi32:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.s, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 4 x i32> zeroinitializer
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}
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define <vscale x 8 x i16> @test_zeroinit_8xi16() {
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; SVE-LABEL: test_zeroinit_8xi16:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_8xi16:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.h, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 8 x i16> zeroinitializer
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}
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define <vscale x 16 x i8> @test_zeroinit_16xi8() {
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; SVE-LABEL: test_zeroinit_16xi8:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_16xi8:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.b, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 16 x i8> zeroinitializer
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}
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define <vscale x 2 x double> @test_zeroinit_2xf64() {
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; SVE-LABEL: test_zeroinit_2xf64:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_2xf64:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.d, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 2 x double> zeroinitializer
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}
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define <vscale x 4 x float> @test_zeroinit_4xf32() {
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; SVE-LABEL: test_zeroinit_4xf32:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_4xf32:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.s, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 4 x float> zeroinitializer
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}
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define <vscale x 8 x half> @test_zeroinit_8xf16() {
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; SVE-LABEL: test_zeroinit_8xf16:
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; SVE: // %bb.0:
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; SVE-NEXT: movi v0.2d, #0000000000000000
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; SVE-NEXT: ret
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;
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; STREAMING-SVE-LABEL: test_zeroinit_8xf16:
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; STREAMING-SVE: // %bb.0:
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; STREAMING-SVE-NEXT: mov z0.h, #0 // =0x0
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; STREAMING-SVE-NEXT: ret
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ret <vscale x 8 x half> zeroinitializer
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}
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define <vscale x 1 x i1> @test_zeroinit_1xi1() {
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; CHECK-LABEL: test_zeroinit_1xi1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: pfalse p0.b
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; CHECK-NEXT: ret
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ret <vscale x 1 x i1> zeroinitializer
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}
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define <vscale x 2 x i1> @test_zeroinit_2xi1() {
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; CHECK-LABEL: test_zeroinit_2xi1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: pfalse p0.b
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; CHECK-NEXT: ret
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ret <vscale x 2 x i1> zeroinitializer
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}
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define <vscale x 4 x i1> @test_zeroinit_4xi1() {
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; CHECK-LABEL: test_zeroinit_4xi1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: pfalse p0.b
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; CHECK-NEXT: ret
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ret <vscale x 4 x i1> zeroinitializer
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}
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define <vscale x 8 x i1> @test_zeroinit_8xi1() {
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; CHECK-LABEL: test_zeroinit_8xi1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: pfalse p0.b
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; CHECK-NEXT: ret
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ret <vscale x 8 x i1> zeroinitializer
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}
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define <vscale x 16 x i1> @test_zeroinit_16xi1() {
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; CHECK-LABEL: test_zeroinit_16xi1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: pfalse p0.b
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; CHECK-NEXT: ret
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ret <vscale x 16 x i1> zeroinitializer
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}
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define target("aarch64.svcount") @test_zeroinit_svcount() "target-features"="+sme2" {
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; CHECK-LABEL: test_zeroinit_svcount:
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; CHECK: // %bb.0:
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; CHECK-NEXT: pfalse p0.b
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; CHECK-NEXT: ret
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ret target("aarch64.svcount") zeroinitializer
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}
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