llvm-project/llvm/test/CodeGen/ARM/machine-sink-multidef.ll
Matthias Braun 02ba5b8c6b Ignore load/store until stack address computation
No longer conservatively assume a load/store accesses the stack when we
can prove that we did not compute any stack-relative address up to this
point in the program.

We do this in a cheap not-quite-a-dataflow-analysis: Assume
`NoStackAddressUsed` when all predecessors of a block already guarantee
it. Process blocks in reverse post order to guarantee that except for
loop headers we have processed all predecessors of a block before
processing the block itself. For loops we accept the conservative answer
as they are unlikely to be shrink-wrappable anyway.

Differential Revision: https://reviews.llvm.org/D152213
2023-06-26 13:50:36 -07:00

57 lines
1.9 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm-none-eabi | FileCheck %s
%struct.anon.1.19.23.27.35.49.55.57.59.61.89.95 = type { i32, i32 }
@e = external constant [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], align 4
@f = external global i32, align 4
define arm_aapcscc void @g() {
; CHECK-LABEL: g:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: ldr r0, .LCPI0_0
; CHECK-NEXT: mov r2, #0
; CHECK-NEXT: ldr r1, .LCPI0_1
; CHECK-NEXT: cmp r2, #0
; CHECK-NEXT: ldr r0, [r0]
; CHECK-NEXT: ldr r0, [r1, r0, lsl #3]!
; CHECK-NEXT: moveq r0, #0
; CHECK-NEXT: cmp r2, #0
; CHECK-NEXT: movne pc, lr
; CHECK-NEXT: .LBB0_1: @ %if.then5
; CHECK-NEXT: .save {r11, lr}
; CHECK-NEXT: push {r11, lr}
; CHECK-NEXT: ldr r1, [r1, #4]
; CHECK-NEXT: bl k
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: @ %bb.2:
; CHECK-NEXT: .LCPI0_0:
; CHECK-NEXT: .long f
; CHECK-NEXT: .LCPI0_1:
; CHECK-NEXT: .long e
entry:
%0 = load i32, ptr @f, align 4
%c = getelementptr inbounds [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], ptr @e, i32 0, i32 %0, i32 0
%1 = load i32, ptr %c, align 4
%d = getelementptr inbounds [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], ptr @e, i32 0, i32 %0, i32 1
%2 = load i32, ptr %d, align 4
br i1 undef, label %land.lhs.true, label %if.end
land.lhs.true: ; preds = %entry
br label %if.end
if.end: ; preds = %land.lhs.true, %entry
%h.0 = phi i32 [ %1, %entry ], [ 0, %land.lhs.true ]
br i1 undef, label %if.end7, label %if.then5
if.then5: ; preds = %if.end
%call6 = call arm_aapcscc i32 @k(i32 %h.0, i32 %2)
unreachable
if.end7: ; preds = %if.end
ret void
}
declare arm_aapcscc i32 @k(...)