llvm-project/llvm/test/CodeGen/ARM/splitkit-remat-regclass-constraint-regression.ll
Matt Arsenault b21663cb5b
SplitKit: Take register class directly from instruction definition (#129727)
This fixes an expensive chesk failure after 8476a5d480304. The issue
was essentially that getRegClassConstraintEffectForVReg was not doing
anything useful, sometimes. If the register passed to it is not present
in the instruction, it is a no-op and returns the original classe. The
Edit->getReg() register may not be the register as it appears in either
the use or def instruction. It may be some split register, so take
the register directly from the instruction being rematerialized.

Also directly query the constraint from the def instruction, with a
hardcoded operand index. This isn't ideal, but all the other
rematerialize
code makes the same assumption.

So far I've been unable to reproduce this with a standalone MIR test. In
the
original case, stop-before=greedy and running the one pass is not
working.
2025-03-06 20:06:35 +07:00

40 lines
1.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -stress-regalloc=2 -o - %s | FileCheck %s
; Check that no register class constraint error is produced during
; rematerialization
target triple = "thumbv7-apple-ios"
declare ptr @_Znwm()
define void @func() {
; CHECK-LABEL: func:
; CHECK: @ %bb.0: @ %bb14
; CHECK-NEXT: str lr, [sp, #-4]!
; CHECK-NEXT: movs r0, #0
; CHECK-NEXT: movs r1, #4
; CHECK-NEXT: str r0, [r1]
; CHECK-NEXT: movs r1, #8
; CHECK-NEXT: str r0, [r1]
; CHECK-NEXT: str r0, [r0]
; CHECK-NEXT: bl __Znwm
; CHECK-NEXT: movs r1, #0
; CHECK-NEXT: movs r0, #4
; CHECK-NEXT: str r1, [r0]
; CHECK-NEXT: movs r0, #8
; CHECK-NEXT: str r1, [r0]
; CHECK-NEXT: str r1, [r1]
; CHECK-NEXT: ldr lr, [sp], #4
; CHECK-NEXT: bx lr
bb14:
call void @llvm.memset.p0.i32(ptr null, i8 0, i32 12, i1 false)
%tmp34 = call ptr @_Znwm()
call void @llvm.memset.p0.i32(ptr null, i8 0, i32 12, i1 false)
ret void
}
declare void @llvm.memset.p0.i32(ptr writeonly captures(none), i8, i32, i1 immarg) #0
attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: write) }