2caf85ad7a
Currently, LOAD_STACK_GUARD on ARM is only implemented for Mach-O targets, and other targets rely on the generic support which may result in spilling of the stack canary value or address, or may cause it to be kept in a callee save register across function calls, which means they essentially get spilled as well, only by the callee when it wants to free up this register. So let's implement LOAD_STACK GUARD for other targets as well. This ensures that the load of the stack canary is rematerialized fully in the epilogue. This code was split off from D112768: [ARM] implement support for TLS register based stack protector for which it is a prerequisite. Reviewed By: nickdesaulniers Differential Revision: https://reviews.llvm.org/D112811
14 lines
479 B
LLVM
14 lines
479 B
LLVM
; RUN: llc -O0 --frame-pointer=none -mtriple=arm-- -o - %S/../Inputs/stack-guard-reassign.ll | FileCheck %s
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; Verify that the offset assigned to the stack protector is at the top of the
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; frame, covering the locals.
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; CHECK-LABEL: fn:
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; CHECK: sub sp, sp, #16
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; CHECK-NEXT: sub sp, sp, #65536
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; CHECK-NEXT: ldr r1, .LCPI0_0
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; CHECK-NEXT: ldr r1, [r1]
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; CHECK-NEXT: add lr, sp, #65536
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; CHECK-NEXT: str r1, [lr, #12]
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; CHECK: .LCPI0_0:
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; CHECK-NEXT: .long __stack_chk_guard
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