8e901c255d
We can decide whether to expand isel or not in instruction selection pass and early-if-conversion pass. The transformation implemented in PPCExpandISel can be retired considering PPC backend doesn't generate `isel` instructions post-RA. Also if we are seeking performant branch-or-isel decision, we can turn to selectoptimize pass. --------- Co-authored-by: Kai Luo <lkail@cn.ibm.com>
52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; RUN: llc -verify-machineinstrs -mcpu=a2 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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define i64 @test1(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpld 3, 4
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; CHECK-NEXT: isellt 3, 6, 5
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: test1:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cmpld 3, 4
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; CHECK-NO-ISEL-NEXT: bge 0, .LBB0_2
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
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; CHECK-NO-ISEL-NEXT: mr 5, 6
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; CHECK-NO-ISEL-NEXT: .LBB0_2: # %entry
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; CHECK-NO-ISEL-NEXT: mr 3, 5
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%p = icmp uge i64 %a, %b
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%x = select i1 %p, i64 %c, i64 %d
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ret i64 %x
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}
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define i32 @test2(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmplw 3, 4
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; CHECK-NEXT: isellt 3, 6, 5
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: test2:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: cmplw 3, 4
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; CHECK-NO-ISEL-NEXT: bge 0, .LBB1_2
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry
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; CHECK-NO-ISEL-NEXT: mr 5, 6
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; CHECK-NO-ISEL-NEXT: .LBB1_2: # %entry
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; CHECK-NO-ISEL-NEXT: mr 3, 5
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%p = icmp uge i32 %a, %b
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%x = select i1 %p, i32 %c, i32 %d
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ret i32 %x
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}
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